1; RUN: llc -march=hexagon < %s | FileCheck %s 2 3@d = external global <16 x i32> 4 5; CHECK-LABEL: test18: 6; CHECK: v{{[0-9]+}}.uw = vcl0(v{{[0-9]+}}.uw) 7define void @test18(<16 x i32> %a) #0 { 8entry: 9 %0 = tail call <16 x i32> @llvm.hexagon.V6.vcl0w(<16 x i32> %a) 10 store <16 x i32> %0, <16 x i32>* @d, align 64 11 ret void 12} 13 14; CHECK-LABEL: test19: 15; CHECK: v{{[0-9]+}}.h = vpopcount(v{{[0-9]+}}.h) 16define void @test19(<16 x i32> %a) #0 { 17entry: 18 %0 = tail call <16 x i32> @llvm.hexagon.V6.vpopcounth(<16 x i32> %a) 19 store <16 x i32> %0, <16 x i32>* @d, align 64 20 ret void 21} 22 23; CHECK-LABEL: test20: 24; CHECK: v{{[0-9]+}}.uh = vcl0(v{{[0-9]+}}.uh) 25define void @test20(<16 x i32> %a) #0 { 26entry: 27 %0 = tail call <16 x i32> @llvm.hexagon.V6.vcl0h(<16 x i32> %a) 28 store <16 x i32> %0, <16 x i32>* @d, align 64 29 ret void 30} 31 32; CHECK-LABEL: test21: 33; CHECK: v{{[0-9]+}}.w = vnormamt(v{{[0-9]+}}.w) 34define void @test21(<16 x i32> %a) #0 { 35entry: 36 %0 = tail call <16 x i32> @llvm.hexagon.V6.vnormamtw(<16 x i32> %a) 37 store <16 x i32> %0, <16 x i32>* @d, align 64 38 ret void 39} 40 41; CHECK-LABEL: test22: 42; CHECK: v{{[0-9]+}}.h = vnormamt(v{{[0-9]+}}.h) 43define void @test22(<16 x i32> %a) #0 { 44entry: 45 %0 = tail call <16 x i32> @llvm.hexagon.V6.vnormamth(<16 x i32> %a) 46 store <16 x i32> %0, <16 x i32>* @d, align 64 47 ret void 48} 49 50declare <16 x i32> @llvm.hexagon.V6.vcl0w(<16 x i32>) #0 51declare <16 x i32> @llvm.hexagon.V6.vpopcounth(<16 x i32>) #0 52declare <16 x i32> @llvm.hexagon.V6.vcl0h(<16 x i32>) #0 53declare <16 x i32> @llvm.hexagon.V6.vnormamtw(<16 x i32>) #0 54declare <16 x i32> @llvm.hexagon.V6.vnormamth(<16 x i32>) #0 55 56attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 57