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1; RUN: llc -march=hexagon -filetype=obj -o /dev/null < %s
2; REQUIRES: asserts
3
4; This crashed in the MC code emitter, because a new-value branch was created
5; with IMPLICIT_DEF as the producer.
6
7target triple = "hexagon"
8
9%type.0 = type { %type.1, [64 x i8] }
10%type.1 = type { [12 x i8], %type.2*, double }
11%type.2 = type { i16, i16, [1 x %type.3] }
12%type.3 = type { i32 }
13%type.4 = type { %type.2*, i32 }
14
15define hidden fastcc i8* @fred(%type.0* nocapture readonly %a0, i8* readonly %a1) unnamed_addr #2 {
16b2:
17  %v3 = load i8, i8* %a1, align 1
18  br i1 undef, label %b4, label %b24
19
20b4:                                               ; preds = %b2
21  switch i8 %v3, label %b13 [
22    i8 25, label %b5
23    i8 26, label %b6
24    i8 28, label %b8
25    i8 27, label %b9
26    i8 43, label %b11
27    i8 110, label %b12
28  ]
29
30b5:                                               ; preds = %b4
31  unreachable
32
33b6:                                               ; preds = %b4
34  %v7 = getelementptr inbounds i8, i8* %a1, i32 2
35  br label %b16
36
37b8:                                               ; preds = %b4
38  br label %b16
39
40b9:                                               ; preds = %b4
41  %v10 = tail call fastcc i8* @fred(%type.0* undef, i8* undef)
42  br label %b24
43
44b11:                                              ; preds = %b4
45  unreachable
46
47b12:                                              ; preds = %b4
48  unreachable
49
50b13:                                              ; preds = %b4
51  br label %b14
52
53b14:                                              ; preds = %b13
54  br i1 undef, label %b15, label %b16
55
56b15:                                              ; preds = %b14
57  unreachable
58
59b16:                                              ; preds = %b20, %b14, %b8, %b6
60  %v17 = phi i8* [ %v21, %b20 ], [ undef, %b14 ], [ undef, %b8 ], [ %v7, %b6 ]
61  %v18 = phi i32 [ 0, %b20 ], [ undef, %b14 ], [ 0, %b8 ], [ 8, %b6 ]
62  %v19 = icmp sgt i32 %v18, 0
63  br i1 %v19, label %b20, label %b24
64
65b20:                                              ; preds = %b16
66  %v21 = getelementptr inbounds i8, i8* %v17, i32 1
67  %v22 = load i8, i8* %v17, align 1
68  %v23 = icmp eq i8 %v22, undef
69  br i1 %v23, label %b16, label %b24
70
71b24:                                              ; preds = %b20, %b16, %b9, %b2
72  %v25 = phi i8* [ null, %b2 ], [ null, %b9 ], [ %v17, %b16 ], [ null, %b20 ]
73  ret i8* %v25
74}
75
76attributes #0 = { argmemonly nounwind }
77attributes #1 = { nounwind readonly "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b,-long-calls" }
78attributes #2 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b,-long-calls" }
79
80