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1; RUN: llc -march=mipsel -O0 < %s | FileCheck %s -check-prefix=None
2; RUN: llc -march=mipsel     -relocation-model=pic    < %s | \
3; RUN: FileCheck %s -check-prefix=Default
4; RUN: llc -march=mipsel -O1 -relocation-model=static < %s | \
5; RUN: FileCheck %s -check-prefix=STATICO1
6; RUN: llc -march=mipsel -disable-mips-df-forward-search=false \
7; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=FORWARD
8; RUN: llc -march=mipsel -disable-mips-df-backward-search -relocation-model=pic \
9; RUN: -enable-shrink-wrap=false \
10; RUN: -disable-mips-df-succbb-search=false -disable-preheader-prot=true < %s | \
11; RUN: FileCheck %s -check-prefix=SUCCBB
12
13define void @foo1() nounwind {
14entry:
15; Default:     jalr
16; Default-NOT: nop
17; Default:     jr
18; Default-NOT: nop
19; Default:     .end
20; None: jalr
21; None: nop
22; None: jr
23; None: nop
24; None: .end
25
26  call void @foo2(i32 3) nounwind
27  ret void
28}
29
30declare void @foo2(i32)
31
32; Check that cvt.d.w goes into jalr's delay slot.
33;
34define void @foo3(i32 %a) nounwind {
35entry:
36; Default-LABEL:     foo3:
37; Default:     jalr
38; Default:     cvt.d.w
39
40  %conv = sitofp i32 %a to double
41  call void @foo4(double %conv) nounwind
42  ret void
43}
44
45declare void @foo4(double)
46
47@g2 = external global i32
48@g1 = external global i32
49@g3 = external global i32
50
51; Check that branch delay slot can be filled with an instruction with operand
52; $1.
53;
54; Default-LABEL:     foo5:
55; Default-NOT: nop
56
57define void @foo5(i32 %a) nounwind {
58entry:
59  %0 = load i32, i32* @g2, align 4
60  %tobool = icmp eq i32 %a, 0
61  br i1 %tobool, label %if.else, label %if.then
62
63if.then:
64  %1 = load i32, i32* @g1, align 4
65  %add = add nsw i32 %1, %0
66  store i32 %add, i32* @g1, align 4
67  br label %if.end
68
69if.else:
70  %2 = load i32, i32* @g3, align 4
71  %sub = sub nsw i32 %2, %0
72  store i32 %sub, i32* @g3, align 4
73  br label %if.end
74
75if.end:
76  ret void
77}
78
79; Check that delay slot filler can place mov.s or mov.d in delay slot.
80;
81; Default-LABEL:     foo6:
82; Default-NOT: nop
83; Default:     .end foo6
84
85define void @foo6(float %a0, double %a1) nounwind {
86entry:
87  call void @foo7(double %a1, float %a0) nounwind
88  ret void
89}
90
91declare void @foo7(double, float)
92
93; Check that a store can move past other memory instructions.
94;
95; STATICO1-LABEL:      foo8:
96; STATICO1:      jalr ${{[0-9]+}}
97; STATICO1-NEXT: sw ${{[0-9]+}}, %lo(g1)
98
99@foo9 = common global void ()* null, align 4
100
101define i32 @foo8(i32 %a) nounwind {
102entry:
103  store i32 %a, i32* @g1, align 4
104  %0 = load void ()*, void ()** @foo9, align 4
105  call void %0() nounwind
106  %1 = load i32, i32* @g1, align 4
107  %add = add nsw i32 %1, %a
108  ret i32 %add
109}
110
111; Test searchForward. Check that the second jal's slot is filled with another
112; instruction in the same block.
113;
114; FORWARD-LABEL:     foo10:
115; FORWARD:     jal foo11
116; FORWARD:     jal foo11
117; FORWARD-NOT: nop
118; FORWARD:     end foo10
119
120define void @foo10() nounwind {
121entry:
122  tail call void @foo11() nounwind
123  tail call void @foo11() nounwind
124  store i32 0, i32* @g1, align 4
125  tail call void @foo11() nounwind
126  store i32 0, i32* @g1, align 4
127  ret void
128}
129
130declare void @foo11()
131
132; Check that delay slots of branches in both the entry block and loop body are
133; filled.
134;
135; SUCCBB-LABEL:      succbbs_loop1:
136; SUCCBB:      blez $5, $BB
137; SUCCBB-NEXT: addiu
138; SUCCBB:      bnez ${{[0-9]+}}, $BB
139; SUCCBB-NEXT: addiu
140
141define i32 @succbbs_loop1(i32* nocapture %a, i32 %n) {
142entry:
143  %cmp4 = icmp sgt i32 %n, 0
144  br i1 %cmp4, label %for.body, label %for.end
145
146for.body:                                         ; preds = %entry, %for.body
147  %s.06 = phi i32 [ %add, %for.body ], [ 0, %entry ]
148  %i.05 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
149  %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.05
150  %0 = load i32, i32* %arrayidx, align 4
151  %add = add nsw i32 %0, %s.06
152  %inc = add nsw i32 %i.05, 1
153  %exitcond = icmp eq i32 %inc, %n
154  br i1 %exitcond, label %for.end, label %for.body
155
156for.end:                                          ; preds = %for.body, %entry
157  %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
158  ret i32 %s.0.lcssa
159}
160
161; Check that the first branch has its slot filled.
162;
163; SUCCBB-LABEL:      succbbs_br1:
164; SUCCBB:      beqz ${{[0-9]+}}, $BB
165; SUCCBB-NEXT: lw ${{[0-9]+}}, %got(foo101)(${{[0-9]+}})
166
167define internal fastcc void @foo101() {
168entry:
169  tail call void @foo100()
170  tail call void @foo100()
171  ret void
172}
173
174define void @succbbs_br1(i32 %a) {
175entry:
176  %tobool = icmp eq i32 %a, 0
177  br i1 %tobool, label %if.end, label %if.then
178
179if.then:                                          ; preds = %entry
180  tail call fastcc void @foo101()
181  br label %if.end
182
183if.end:                                           ; preds = %entry, %if.then
184  ret void
185}
186
187declare void @foo100()
188