1; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \ 2; RUN: -enable-ppc-quad-precision -ppc-vsr-nums-as-vr \ 3; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s 4 5@mem = global [5 x i64] [i64 56, i64 63, i64 3, i64 5, i64 6], align 8 6@umem = global [5 x i64] [i64 560, i64 100, i64 34, i64 2, i64 5], align 8 7@swMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4 8@uwMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4 9@uhwMem = local_unnamed_addr global [5 x i16] [i16 5, i16 2, i16 3, i16 4, i16 0], align 2 10@ubMem = local_unnamed_addr global [5 x i8] c"\05\02\03\04\00", align 1 11 12; Function Attrs: norecurse nounwind 13define void @sdwConv2qp(fp128* nocapture %a, i64 %b) { 14entry: 15 %conv = sitofp i64 %b to fp128 16 store fp128 %conv, fp128* %a, align 16 17 ret void 18 19; CHECK-LABEL: sdwConv2qp 20; CHECK: mtvsrd v[[REG:[0-9]+]], r4 21; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 22; CHECK-NEXT: stxv v[[CONV]], 0(r3) 23; CHECK-NEXT: blr 24} 25 26; Function Attrs: norecurse nounwind 27define void @sdwConv2qp_02(fp128* nocapture %a) { 28entry: 29 %0 = load i64, i64* getelementptr inbounds 30 ([5 x i64], [5 x i64]* @mem, i64 0, i64 2), align 8 31 %conv = sitofp i64 %0 to fp128 32 store fp128 %conv, fp128* %a, align 16 33 ret void 34 35; CHECK-LABEL: sdwConv2qp_02 36; CHECK: addis r[[REG:[0-9]+]], r2, .LC0@toc@ha 37; CHECK: ld r[[REG]], .LC0@toc@l(r[[REG]]) 38; CHECK: lxsd v[[REG0:[0-9]+]], 16(r[[REG]]) 39; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG0]] 40; CHECK-NEXT: stxv v[[CONV]], 0(r3) 41; CHECK-NEXT: blr 42} 43 44; Function Attrs: norecurse nounwind 45define void @sdwConv2qp_03(fp128* nocapture %a, i64* nocapture readonly %b) { 46entry: 47 %0 = load i64, i64* %b, align 8 48 %conv = sitofp i64 %0 to fp128 49 store fp128 %conv, fp128* %a, align 16 50 ret void 51 52; CHECK-LABEL: sdwConv2qp_03 53; CHECK-NOT: ld 54; CHECK: lxsd v[[REG0:[0-9]+]], 0(r4) 55; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG0]] 56; CHECK-NEXT: stxv v[[CONV]], 0(r3) 57; CHECK-NEXT: blr 58} 59 60; Function Attrs: norecurse nounwind 61define void @udwConv2qp(fp128* nocapture %a, i64 %b) { 62entry: 63 %conv = uitofp i64 %b to fp128 64 store fp128 %conv, fp128* %a, align 16 65 ret void 66 67; CHECK-LABEL: udwConv2qp 68; CHECK: mtvsrd v[[REG:[0-9]+]], r4 69; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 70; CHECK-NEXT: stxv v[[CONV]], 0(r3) 71; CHECK-NEXT: blr 72} 73 74; Function Attrs: norecurse nounwind 75define void @udwConv2qp_02(fp128* nocapture %a) { 76entry: 77 %0 = load i64, i64* getelementptr inbounds 78 ([5 x i64], [5 x i64]* @umem, i64 0, i64 4), align 8 79 %conv = uitofp i64 %0 to fp128 80 store fp128 %conv, fp128* %a, align 16 81 ret void 82 83; CHECK-LABEL: udwConv2qp_02 84; CHECK: addis r[[REG:[0-9]+]], r2, .LC1@toc@ha 85; CHECK: ld r[[REG]], .LC1@toc@l(r[[REG]]) 86; CHECK: lxsd v[[REG0:[0-9]+]], 32(r[[REG]]) 87; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG0]] 88; CHECK-NEXT: stxv v[[CONV]], 0(r3) 89; CHECK-NEXT: blr 90} 91 92; Function Attrs: norecurse nounwind 93define void @udwConv2qp_03(fp128* nocapture %a, i64* nocapture readonly %b) { 94entry: 95 %0 = load i64, i64* %b, align 8 96 %conv = uitofp i64 %0 to fp128 97 store fp128 %conv, fp128* %a, align 16 98 ret void 99 100; CHECK-LABEL: udwConv2qp_03 101; CHECK-NOT: ld 102; CHECK: lxsd v[[REG:[0-9]+]], 0(r4) 103; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 104; CHECK-NEXT: stxv v[[CONV]], 0(r3) 105; CHECK-NEXT: blr 106} 107 108; Function Attrs: norecurse nounwind 109define fp128* @sdwConv2qp_testXForm(fp128* returned %sink, 110 i8* nocapture readonly %a) { 111entry: 112 %add.ptr = getelementptr inbounds i8, i8* %a, i64 73333 113 %0 = bitcast i8* %add.ptr to i64* 114 %1 = load i64, i64* %0, align 8 115 %conv = sitofp i64 %1 to fp128 116 store fp128 %conv, fp128* %sink, align 16 117 ret fp128* %sink 118 119; CHECK-LABEL: sdwConv2qp_testXForm 120; CHECK: lxsdx v[[REG:[0-9]+]], 121; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 122; CHECK-NEXT: stxv v[[CONV]], 0(r3) 123; CHECK-NEXT: blr 124} 125 126; Function Attrs: norecurse nounwind 127define fp128* @udwConv2qp_testXForm(fp128* returned %sink, 128 i8* nocapture readonly %a) { 129entry: 130 %add.ptr = getelementptr inbounds i8, i8* %a, i64 73333 131 %0 = bitcast i8* %add.ptr to i64* 132 %1 = load i64, i64* %0, align 8 133 %conv = uitofp i64 %1 to fp128 134 store fp128 %conv, fp128* %sink, align 16 135 ret fp128* %sink 136 137; CHECK-LABEL: udwConv2qp_testXForm 138; CHECK: lxsdx v[[REG:[0-9]+]], 139; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 140; CHECK-NEXT: stxv v[[CONV]], 0(r3) 141; CHECK-NEXT: blr 142} 143 144; Function Attrs: norecurse nounwind 145define void @swConv2qp(fp128* nocapture %a, i32 signext %b) { 146entry: 147 %conv = sitofp i32 %b to fp128 148 store fp128 %conv, fp128* %a, align 16 149 ret void 150 151; CHECK-LABEL: swConv2qp 152; CHECK-NOT: lwz 153; CHECK: mtvsrwa v[[REG:[0-9]+]], r4 154; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 155; CHECK-NEXT: stxv v[[CONV]], 0(r3) 156; CHECK-NEXT: blr 157} 158 159; Function Attrs: norecurse nounwind 160define void @swConv2qp_02(fp128* nocapture %a, i32* nocapture readonly %b) { 161entry: 162 %0 = load i32, i32* %b, align 4 163 %conv = sitofp i32 %0 to fp128 164 store fp128 %conv, fp128* %a, align 16 165 ret void 166 167; CHECK-LABEL: swConv2qp_02 168; CHECK-NOT: lwz 169; CHECK: lxsiwax v[[REG:[0-9]+]], 0, r4 170; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 171; CHECK-NEXT: stxv v[[CONV]], 0(r3) 172; CHECK-NEXT: blr 173} 174 175; Function Attrs: norecurse nounwind 176define void @swConv2qp_03(fp128* nocapture %a) { 177entry: 178 %0 = load i32, i32* getelementptr inbounds 179 ([5 x i32], [5 x i32]* @swMem, i64 0, i64 3), align 4 180 %conv = sitofp i32 %0 to fp128 181 store fp128 %conv, fp128* %a, align 16 182 ret void 183 184; CHECK-LABEL: swConv2qp_03 185; CHECK: addis r[[REG:[0-9]+]], r2, .LC2@toc@ha 186; CHECK: ld r[[REG]], .LC2@toc@l(r[[REG]]) 187; CHECK: addi r[[REG2:[0-9]+]], r[[REG]], 12 188; CHECK: lxsiwax v[[REG0:[0-9]+]], 0, r[[REG2]] 189; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG0]] 190; CHECK-NEXT: stxv v[[CONV]], 0(r3) 191; CHECK-NEXT: blr 192} 193 194; Function Attrs: norecurse nounwind 195define void @uwConv2qp(fp128* nocapture %a, i32 zeroext %b) { 196entry: 197 %conv = uitofp i32 %b to fp128 198 store fp128 %conv, fp128* %a, align 16 199 ret void 200 201; CHECK-LABEL: uwConv2qp 202; CHECK-NOT: lwz 203; CHECK: mtvsrwz v[[REG:[0-9]+]], r4 204; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 205; CHECK-NEXT: stxv v[[CONV]], 0(r3) 206; CHECK-NEXT: blr 207} 208 209; Function Attrs: norecurse nounwind 210define void @uwConv2qp_02(fp128* nocapture %a, i32* nocapture readonly %b) { 211entry: 212 %0 = load i32, i32* %b, align 4 213 %conv = uitofp i32 %0 to fp128 214 store fp128 %conv, fp128* %a, align 16 215 ret void 216 217; CHECK-LABEL: uwConv2qp_02 218; CHECK-NOT: lwz 219; CHECK: lxsiwzx v[[REG:[0-9]+]], 0, r4 220; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 221; CHECK-NEXT: stxv v[[CONV]], 0(r3) 222; CHECK-NEXT: blr 223} 224 225; Function Attrs: norecurse nounwind 226define void @uwConv2qp_03(fp128* nocapture %a) { 227entry: 228 %0 = load i32, i32* getelementptr inbounds 229 ([5 x i32], [5 x i32]* @uwMem, i64 0, i64 3), align 4 230 %conv = uitofp i32 %0 to fp128 231 store fp128 %conv, fp128* %a, align 16 232 ret void 233 234; CHECK-LABEL: uwConv2qp_03 235; CHECK: addis r[[REG:[0-9]+]], r2, .LC3@toc@ha 236; CHECK-NEXT: ld r[[REG]], .LC3@toc@l(r[[REG]]) 237; CHECK-NEXT: addi r[[REG2:[0-9]+]], r[[REG]], 12 238; CHECK-NEXT: lxsiwzx v[[REG1:[0-9]+]], 0, r[[REG2]] 239; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG1]] 240; CHECK-NEXT: stxv v[[CONV]], 0(r3) 241; CHECK-NEXT: blr 242} 243 244; Function Attrs: norecurse nounwind 245define void @uwConv2qp_04(fp128* nocapture %a, 246 i32 zeroext %b, i32* nocapture readonly %c) { 247entry: 248 %0 = load i32, i32* %c, align 4 249 %add = add i32 %0, %b 250 %conv = uitofp i32 %add to fp128 251 store fp128 %conv, fp128* %a, align 16 252 ret void 253 254; CHECK-LABEL: uwConv2qp_04 255; CHECK: lwz r[[REG:[0-9]+]], 0(r5) 256; CHECK-NEXT: add r[[REG1:[0-9]+]], r[[REG]], r[[REG1]] 257; CHECK-NEXT: mtvsrwz v[[REG0:[0-9]+]], r[[REG1]] 258; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG0]] 259; CHECK-NEXT: stxv v[[CONV]], 0(r3) 260; CHECK-NEXT: blr 261} 262 263; Function Attrs: norecurse nounwind 264define void @uhwConv2qp(fp128* nocapture %a, i16 zeroext %b) { 265entry: 266 %conv = uitofp i16 %b to fp128 267 store fp128 %conv, fp128* %a, align 16 268 ret void 269 270 271; CHECK-LABEL: uhwConv2qp 272; CHECK: mtvsrwz v[[REG:[0-9]+]], r4 273; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 274; CHECK-NEXT: stxv v[[CONV]], 0(r3) 275; CHECK-NEXT: blr 276} 277 278; Function Attrs: norecurse nounwind 279define void @uhwConv2qp_02(fp128* nocapture %a, i16* nocapture readonly %b) { 280entry: 281 %0 = load i16, i16* %b, align 2 282 %conv = uitofp i16 %0 to fp128 283 store fp128 %conv, fp128* %a, align 16 284 ret void 285 286; CHECK-LABEL: uhwConv2qp_02 287; CHECK: lxsihzx v[[REG:[0-9]+]], 0, r4 288; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 289; CHECK-NEXT: stxv v[[CONV]], 0(r3) 290; CHECK-NEXT: blr 291} 292 293; Function Attrs: norecurse nounwind 294define void @uhwConv2qp_03(fp128* nocapture %a) { 295entry: 296 %0 = load i16, i16* getelementptr inbounds 297 ([5 x i16], [5 x i16]* @uhwMem, i64 0, i64 3), align 2 298 %conv = uitofp i16 %0 to fp128 299 store fp128 %conv, fp128* %a, align 16 300 ret void 301 302; CHECK-LABEL: uhwConv2qp_03 303; CHECK: addis r[[REG0:[0-9]+]], r2, .LC4@toc@ha 304; CHECK: ld r[[REG0]], .LC4@toc@l(r[[REG0]]) 305; CHECK: addi r[[REG0]], r[[REG0]], 6 306; CHECK: lxsihzx v[[REG:[0-9]+]], 0, r[[REG0]] 307; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 308; CHECK-NEXT: stxv v[[CONV]], 0(r3) 309; CHECK-NEXT: blr 310} 311 312; Function Attrs: norecurse nounwind 313define void @uhwConv2qp_04(fp128* nocapture %a, i16 zeroext %b, 314 i16* nocapture readonly %c) { 315entry: 316 %conv = zext i16 %b to i32 317 %0 = load i16, i16* %c, align 2 318 %conv1 = zext i16 %0 to i32 319 %add = add nuw nsw i32 %conv1, %conv 320 %conv2 = sitofp i32 %add to fp128 321 store fp128 %conv2, fp128* %a, align 16 322 ret void 323 324; CHECK-LABEL: uhwConv2qp_04 325; CHECK: lhz r[[REG0:[0-9]+]], 0(r5) 326; CHECK: add r4, r[[REG0]], r4 327; CHECK: mtvsrwa v[[REG:[0-9]+]], r4 328; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 329; CHECK-NEXT: stxv v[[CONV]], 0(r3) 330; CHECK-NEXT: blr 331} 332 333; Function Attrs: norecurse nounwind 334define void @ubConv2qp(fp128* nocapture %a, i8 zeroext %b) { 335entry: 336 %conv = uitofp i8 %b to fp128 337 store fp128 %conv, fp128* %a, align 16 338 ret void 339 340; CHECK-LABEL: ubConv2qp 341; CHECK: mtvsrwz v[[REG:[0-9]+]], r4 342; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 343; CHECK-NEXT: stxv v[[CONV]], 0(r3) 344; CHECK-NEXT: blr 345} 346 347; Function Attrs: norecurse nounwind 348define void @ubConv2qp_02(fp128* nocapture %a, i8* nocapture readonly %b) { 349entry: 350 %0 = load i8, i8* %b, align 1 351 %conv = uitofp i8 %0 to fp128 352 store fp128 %conv, fp128* %a, align 16 353 ret void 354 355; CHECK-LABEL: ubConv2qp_02 356; CHECK: lxsibzx v[[REG:[0-9]+]], 0, r4 357; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 358; CHECK-NEXT: stxv v[[CONV]], 0(r3) 359; CHECK-NEXT: blr 360} 361 362; Function Attrs: norecurse nounwind 363define void @ubConv2qp_03(fp128* nocapture %a) { 364entry: 365 %0 = load i8, i8* getelementptr inbounds 366 ([5 x i8], [5 x i8]* @ubMem, i64 0, i64 2), align 1 367 %conv = uitofp i8 %0 to fp128 368 store fp128 %conv, fp128* %a, align 16 369 ret void 370 371; CHECK-LABEL: ubConv2qp_03 372; CHECK: addis r[[REG0:[0-9]+]], r2, .LC5@toc@ha 373; CHECK: ld r[[REG0]], .LC5@toc@l(r[[REG0]]) 374; CHECK: addi r[[REG0]], r[[REG0]], 2 375; CHECK: lxsibzx v[[REG:[0-9]+]], 0, r[[REG0]] 376; CHECK-NEXT: xscvudqp v[[CONV:[0-9]+]], v[[REG]] 377; CHECK-NEXT: stxv v[[CONV]], 0(r3) 378; CHECK-NEXT: blr 379} 380 381; Function Attrs: norecurse nounwind 382define void @ubConv2qp_04(fp128* nocapture %a, i8 zeroext %b, 383 i8* nocapture readonly %c) { 384entry: 385 %conv = zext i8 %b to i32 386 %0 = load i8, i8* %c, align 1 387 %conv1 = zext i8 %0 to i32 388 %add = add nuw nsw i32 %conv1, %conv 389 %conv2 = sitofp i32 %add to fp128 390 store fp128 %conv2, fp128* %a, align 16 391 ret void 392 393; CHECK-LABEL: ubConv2qp_04 394; CHECK: lbz r[[REG0:[0-9]+]], 0(r5) 395; CHECK: add r4, r[[REG0]], r4 396; CHECK: mtvsrwa v[[REG:[0-9]+]], r4 397; CHECK-NEXT: xscvsdqp v[[CONV:[0-9]+]], v[[REG]] 398; CHECK-NEXT: stxv v[[CONV]], 0(r3) 399; CHECK-NEXT: blr 400} 401 402; Convert QP to DP 403 404@f128Array = global [4 x fp128] 405 [fp128 0xL00000000000000004004C00000000000, 406 fp128 0xLF000000000000000400808AB851EB851, 407 fp128 0xL5000000000000000400E0C26324C8366, 408 fp128 0xL8000000000000000400A24E2E147AE14], align 16 409@f128global = global fp128 0xL300000000000000040089CA8F5C28F5C, align 16 410 411; Function Attrs: norecurse nounwind readonly 412define double @qpConv2dp(fp128* nocapture readonly %a) { 413; CHECK-LABEL: qpConv2dp: 414; CHECK: # %bb.0: # %entry 415; CHECK-NEXT: lxv v2, 0(r3) 416; CHECK-NEXT: xscvqpdp v2, v2 417; CHECK-NEXT: xxlor f1, v2, v2 418; CHECK-NEXT: blr 419entry: 420 %0 = load fp128, fp128* %a, align 16 421 %conv = fptrunc fp128 %0 to double 422 ret double %conv 423} 424 425; Function Attrs: norecurse nounwind 426define void @qpConv2dp_02(double* nocapture %res) { 427; CHECK-LABEL: qpConv2dp_02: 428; CHECK: # %bb.0: # %entry 429; CHECK-NEXT: addis r4, r2, .LC6@toc@ha 430; CHECK-NEXT: ld r4, .LC6@toc@l(r4) 431; CHECK-NEXT: lxvx v2, 0, r4 432; CHECK-NEXT: xscvqpdp v2, v2 433; CHECK-NEXT: stxsd v2, 0(r3) 434; CHECK-NEXT: blr 435entry: 436 %0 = load fp128, fp128* @f128global, align 16 437 %conv = fptrunc fp128 %0 to double 438 store double %conv, double* %res, align 8 439 ret void 440} 441 442; Function Attrs: norecurse nounwind 443define void @qpConv2dp_03(double* nocapture %res, i32 signext %idx) { 444; CHECK-LABEL: qpConv2dp_03: 445; CHECK: # %bb.0: # %entry 446; CHECK-NEXT: addis r5, r2, .LC7@toc@ha 447; CHECK-NEXT: sldi r4, r4, 3 448; CHECK-NEXT: ld r5, .LC7@toc@l(r5) 449; CHECK-NEXT: lxvx v2, 0, r5 450; CHECK-NEXT: xscvqpdp v2, v2 451; CHECK-NEXT: stxsdx v2, r3, r4 452; CHECK-NEXT: blr 453entry: 454 %0 = load fp128, fp128* getelementptr inbounds ([4 x fp128], [4 x fp128]* @f128Array, i64 0, i64 0), align 16 455 %conv = fptrunc fp128 %0 to double 456 %idxprom = sext i32 %idx to i64 457 %arrayidx = getelementptr inbounds double, double* %res, i64 %idxprom 458 store double %conv, double* %arrayidx, align 8 459 ret void 460} 461 462; Function Attrs: norecurse nounwind 463define void @qpConv2dp_04(fp128* nocapture readonly %a, fp128* nocapture readonly %b, double* nocapture %res) { 464; CHECK-LABEL: qpConv2dp_04: 465; CHECK: # %bb.0: # %entry 466; CHECK-NEXT: lxv v2, 0(r3) 467; CHECK-NEXT: lxv v3, 0(r4) 468; CHECK-NEXT: xsaddqp v2, v2, v3 469; CHECK-NEXT: xscvqpdp v2, v2 470; CHECK-NEXT: stxsd v2, 0(r5) 471; CHECK-NEXT: blr 472entry: 473 %0 = load fp128, fp128* %a, align 16 474 %1 = load fp128, fp128* %b, align 16 475 %add = fadd fp128 %0, %1 476 %conv = fptrunc fp128 %add to double 477 store double %conv, double* %res, align 8 478 ret void 479} 480 481; Convert QP to SP 482 483; Function Attrs: norecurse nounwind readonly 484define float @qpConv2sp(fp128* nocapture readonly %a) { 485; CHECK-LABEL: qpConv2sp: 486; CHECK: # %bb.0: # %entry 487; CHECK-NEXT: lxv v2, 0(r3) 488; CHECK-NEXT: xscvqpdpo v2, v2 489; CHECK-NEXT: xsrsp f1, v2 490; CHECK-NEXT: blr 491entry: 492 %0 = load fp128, fp128* %a, align 16 493 %conv = fptrunc fp128 %0 to float 494 ret float %conv 495} 496 497; Function Attrs: norecurse nounwind 498define void @qpConv2sp_02(float* nocapture %res) { 499; CHECK-LABEL: qpConv2sp_02: 500; CHECK: # %bb.0: # %entry 501; CHECK-NEXT: addis r4, r2, .LC6@toc@ha 502; CHECK-NEXT: ld r4, .LC6@toc@l(r4) 503; CHECK-NEXT: lxvx v2, 0, r4 504; CHECK-NEXT: xscvqpdpo v2, v2 505; CHECK-NEXT: xsrsp f0, v2 506; CHECK-NEXT: stfs f0, 0(r3) 507; CHECK-NEXT: blr 508entry: 509 %0 = load fp128, fp128* @f128global, align 16 510 %conv = fptrunc fp128 %0 to float 511 store float %conv, float* %res, align 4 512 ret void 513} 514 515; Function Attrs: norecurse nounwind 516define void @qpConv2sp_03(float* nocapture %res, i32 signext %idx) { 517; CHECK-LABEL: qpConv2sp_03: 518; CHECK: # %bb.0: # %entry 519; CHECK-NEXT: addis r5, r2, .LC7@toc@ha 520; CHECK-NEXT: sldi r4, r4, 2 521; CHECK-NEXT: ld r5, .LC7@toc@l(r5) 522; CHECK-NEXT: lxv v2, 48(r5) 523; CHECK-NEXT: xscvqpdpo v2, v2 524; CHECK-NEXT: xsrsp f0, v2 525; CHECK-NEXT: stfsx f0, r3, r4 526; CHECK-NEXT: blr 527entry: 528 %0 = load fp128, fp128* getelementptr inbounds ([4 x fp128], [4 x fp128]* @f128Array, i64 0, i64 3), align 16 529 %conv = fptrunc fp128 %0 to float 530 %idxprom = sext i32 %idx to i64 531 %arrayidx = getelementptr inbounds float, float* %res, i64 %idxprom 532 store float %conv, float* %arrayidx, align 4 533 ret void 534} 535 536; Function Attrs: norecurse nounwind 537define void @qpConv2sp_04(fp128* nocapture readonly %a, fp128* nocapture readonly %b, float* nocapture %res) { 538; CHECK-LABEL: qpConv2sp_04: 539; CHECK: # %bb.0: # %entry 540; CHECK-NEXT: lxv v2, 0(r3) 541; CHECK-NEXT: lxv v3, 0(r4) 542; CHECK-NEXT: xsaddqp v2, v2, v3 543; CHECK-NEXT: xscvqpdpo v2, v2 544; CHECK-NEXT: xsrsp f0, v2 545; CHECK-NEXT: stfs f0, 0(r5) 546; CHECK-NEXT: blr 547entry: 548 %0 = load fp128, fp128* %a, align 16 549 %1 = load fp128, fp128* %b, align 16 550 %add = fadd fp128 %0, %1 551 %conv = fptrunc fp128 %add to float 552 store float %conv, float* %res, align 4 553 ret void 554} 555 556@f128Glob = common global fp128 0xL00000000000000000000000000000000, align 16 557 558; Function Attrs: norecurse nounwind readnone 559define fp128 @dpConv2qp(double %a) { 560; CHECK-LABEL: dpConv2qp: 561; CHECK: # %bb.0: # %entry 562; CHECK-NEXT: xxlor v2, f1, f1 563; CHECK-NEXT: xscvdpqp v2, v2 564; CHECK-NEXT: blr 565entry: 566 %conv = fpext double %a to fp128 567 ret fp128 %conv 568} 569 570; Function Attrs: norecurse nounwind 571define void @dpConv2qp_02(double* nocapture readonly %a) { 572; CHECK-LABEL: dpConv2qp_02: 573; CHECK: # %bb.0: # %entry 574; CHECK-NEXT: lxsd v2, 0(r3) 575; CHECK-NEXT: addis r3, r2, .LC8@toc@ha 576; CHECK-NEXT: ld r3, .LC8@toc@l(r3) 577; CHECK-NEXT: xscvdpqp v2, v2 578; CHECK-NEXT: stxvx v2, 0, r3 579; CHECK-NEXT: blr 580entry: 581 %0 = load double, double* %a, align 8 582 %conv = fpext double %0 to fp128 583 store fp128 %conv, fp128* @f128Glob, align 16 584 ret void 585} 586 587; Function Attrs: norecurse nounwind 588define void @dpConv2qp_02b(double* nocapture readonly %a, i32 signext %idx) { 589; CHECK-LABEL: dpConv2qp_02b: 590; CHECK: # %bb.0: # %entry 591; CHECK-NEXT: sldi r4, r4, 3 592; CHECK-NEXT: lxsdx v2, r3, r4 593; CHECK-NEXT: addis r3, r2, .LC8@toc@ha 594; CHECK-NEXT: ld r3, .LC8@toc@l(r3) 595; CHECK-NEXT: xscvdpqp v2, v2 596; CHECK-NEXT: stxvx v2, 0, r3 597; CHECK-NEXT: blr 598entry: 599 %idxprom = sext i32 %idx to i64 600 %arrayidx = getelementptr inbounds double, double* %a, i64 %idxprom 601 %0 = load double, double* %arrayidx, align 8 602 %conv = fpext double %0 to fp128 603 store fp128 %conv, fp128* @f128Glob, align 16 604 ret void 605} 606 607; Function Attrs: norecurse nounwind 608define void @dpConv2qp_03(fp128* nocapture %res, i32 signext %idx, double %a) { 609; CHECK-LABEL: dpConv2qp_03: 610; CHECK: # %bb.0: # %entry 611; CHECK-NEXT: xxlor v2, f1, f1 612; CHECK-NEXT: sldi r4, r4, 4 613; CHECK-NEXT: xscvdpqp v2, v2 614; CHECK-NEXT: stxvx v2, r3, r4 615; CHECK-NEXT: blr 616entry: 617 %conv = fpext double %a to fp128 618 %idxprom = sext i32 %idx to i64 619 %arrayidx = getelementptr inbounds fp128, fp128* %res, i64 %idxprom 620 store fp128 %conv, fp128* %arrayidx, align 16 621 ret void 622} 623 624; Function Attrs: norecurse nounwind 625define void @dpConv2qp_04(double %a, fp128* nocapture %res) { 626; CHECK-LABEL: dpConv2qp_04: 627; CHECK: # %bb.0: # %entry 628; CHECK-NEXT: xxlor v2, f1, f1 629; CHECK-NEXT: xscvdpqp v2, v2 630; CHECK-NEXT: stxv v2, 0(r4) 631; CHECK-NEXT: blr 632entry: 633 %conv = fpext double %a to fp128 634 store fp128 %conv, fp128* %res, align 16 635 ret void 636} 637 638; Function Attrs: norecurse nounwind readnone 639define fp128 @spConv2qp(float %a) { 640; CHECK-LABEL: spConv2qp: 641; CHECK: # %bb.0: # %entry 642; CHECK-NEXT: xxlor v2, f1, f1 643; CHECK-NEXT: xscvdpqp v2, v2 644; CHECK-NEXT: blr 645entry: 646 %conv = fpext float %a to fp128 647 ret fp128 %conv 648} 649 650; Function Attrs: norecurse nounwind 651define void @spConv2qp_02(float* nocapture readonly %a) { 652; CHECK-LABEL: spConv2qp_02: 653; CHECK: # %bb.0: # %entry 654; CHECK-NEXT: lxssp v2, 0(r3) 655; CHECK-NEXT: addis r3, r2, .LC8@toc@ha 656; CHECK-NEXT: ld r3, .LC8@toc@l(r3) 657; CHECK-NEXT: xscvdpqp v2, v2 658; CHECK-NEXT: stxvx v2, 0, r3 659; CHECK-NEXT: blr 660entry: 661 %0 = load float, float* %a, align 4 662 %conv = fpext float %0 to fp128 663 store fp128 %conv, fp128* @f128Glob, align 16 664 ret void 665} 666 667; Function Attrs: norecurse nounwind 668define void @spConv2qp_02b(float* nocapture readonly %a, i32 signext %idx) { 669; CHECK-LABEL: spConv2qp_02b: 670; CHECK: # %bb.0: # %entry 671; CHECK-NEXT: sldi r4, r4, 2 672; CHECK-NEXT: lxsspx v2, r3, r4 673; CHECK-NEXT: addis r3, r2, .LC8@toc@ha 674; CHECK-NEXT: ld r3, .LC8@toc@l(r3) 675; CHECK-NEXT: xscvdpqp v2, v2 676; CHECK-NEXT: stxvx v2, 0, r3 677; CHECK-NEXT: blr 678entry: 679 %idxprom = sext i32 %idx to i64 680 %arrayidx = getelementptr inbounds float, float* %a, i64 %idxprom 681 %0 = load float, float* %arrayidx, align 4 682 %conv = fpext float %0 to fp128 683 store fp128 %conv, fp128* @f128Glob, align 16 684 ret void 685} 686 687; Function Attrs: norecurse nounwind 688define void @spConv2qp_03(fp128* nocapture %res, i32 signext %idx, float %a) { 689; CHECK-LABEL: spConv2qp_03: 690; CHECK: # %bb.0: # %entry 691; CHECK-NEXT: xxlor v2, f1, f1 692; CHECK-NEXT: sldi r4, r4, 4 693; CHECK-NEXT: xscvdpqp v2, v2 694; CHECK-NEXT: stxvx v2, r3, r4 695; CHECK-NEXT: blr 696entry: 697 %conv = fpext float %a to fp128 698 %idxprom = sext i32 %idx to i64 699 %arrayidx = getelementptr inbounds fp128, fp128* %res, i64 %idxprom 700 store fp128 %conv, fp128* %arrayidx, align 16 701 ret void 702} 703 704; Function Attrs: norecurse nounwind 705define void @spConv2qp_04(float %a, fp128* nocapture %res) { 706; CHECK-LABEL: spConv2qp_04: 707; CHECK: # %bb.0: # %entry 708; CHECK-NEXT: xxlor v2, f1, f1 709; CHECK-NEXT: xscvdpqp v2, v2 710; CHECK-NEXT: stxv v2, 0(r4) 711; CHECK-NEXT: blr 712entry: 713 %conv = fpext float %a to fp128 714 store fp128 %conv, fp128* %res, align 16 715 ret void 716} 717 718; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 719 720; Function Attrs: norecurse nounwind 721define void @cvdp2sw2qp(double %val, fp128* nocapture %res) { 722; CHECK-LABEL: cvdp2sw2qp: 723; CHECK: # %bb.0: # %entry 724; CHECK-NEXT: xscvdpsxws v2, f1 725; CHECK-NEXT: vextsw2d v2, v2 726; CHECK-NEXT: xscvsdqp v2, v2 727; CHECK-NEXT: stxv v2, 0(r4) 728; CHECK-NEXT: blr 729entry: 730 %conv = fptosi double %val to i32 731 %conv1 = sitofp i32 %conv to fp128 732 store fp128 %conv1, fp128* %res, align 16 733 ret void 734} 735 736; Function Attrs: norecurse nounwind 737define void @cvdp2sdw2qp(double %val, fp128* nocapture %res) { 738; CHECK-LABEL: cvdp2sdw2qp: 739; CHECK: # %bb.0: # %entry 740; CHECK-NEXT: xscvdpsxds v2, f1 741; CHECK-NEXT: xscvsdqp v2, v2 742; CHECK-NEXT: stxv v2, 0(r4) 743; CHECK-NEXT: blr 744entry: 745 %conv = fptosi double %val to i64 746 %conv1 = sitofp i64 %conv to fp128 747 store fp128 %conv1, fp128* %res, align 16 748 ret void 749} 750 751; Function Attrs: norecurse nounwind 752define void @cvsp2sw2qp(float %val, fp128* nocapture %res) { 753; CHECK-LABEL: cvsp2sw2qp: 754; CHECK: # %bb.0: # %entry 755; CHECK-NEXT: xscvdpsxws v2, f1 756; CHECK-NEXT: vextsw2d v2, v2 757; CHECK-NEXT: xscvsdqp v2, v2 758; CHECK-NEXT: stxv v2, 0(r4) 759; CHECK-NEXT: blr 760entry: 761 %conv = fptosi float %val to i32 762 %conv1 = sitofp i32 %conv to fp128 763 store fp128 %conv1, fp128* %res, align 16 764 ret void 765} 766 767; Function Attrs: norecurse nounwind 768define void @cvsp2sdw2qp(float %val, fp128* nocapture %res) { 769; CHECK-LABEL: cvsp2sdw2qp: 770; CHECK: # %bb.0: # %entry 771; CHECK-NEXT: xscvdpsxds v2, f1 772; CHECK-NEXT: xscvsdqp v2, v2 773; CHECK-NEXT: stxv v2, 0(r4) 774; CHECK-NEXT: blr 775entry: 776 %conv = fptosi float %val to i64 777 %conv1 = sitofp i64 %conv to fp128 778 store fp128 %conv1, fp128* %res, align 16 779 ret void 780} 781 782; Function Attrs: norecurse nounwind 783define void @cvdp2uw2qp(double %val, fp128* nocapture %res) { 784; CHECK-LABEL: cvdp2uw2qp: 785; CHECK: # %bb.0: # %entry 786; CHECK-NEXT: xscvdpuxws f0, f1 787; CHECK-NEXT: xxextractuw v2, vs0, 8 788; CHECK-NEXT: xscvudqp v2, v2 789; CHECK-NEXT: stxv v2, 0(r4) 790; CHECK-NEXT: blr 791entry: 792 %conv = fptoui double %val to i32 793 %conv1 = uitofp i32 %conv to fp128 794 store fp128 %conv1, fp128* %res, align 16 795 ret void 796} 797 798; Function Attrs: norecurse nounwind 799define void @cvdp2udw2qp(double %val, fp128* nocapture %res) { 800; CHECK-LABEL: cvdp2udw2qp: 801; CHECK: # %bb.0: # %entry 802; CHECK-NEXT: xscvdpuxds v2, f1 803; CHECK-NEXT: xscvudqp v2, v2 804; CHECK-NEXT: stxv v2, 0(r4) 805; CHECK-NEXT: blr 806entry: 807 %conv = fptoui double %val to i64 808 %conv1 = uitofp i64 %conv to fp128 809 store fp128 %conv1, fp128* %res, align 16 810 ret void 811} 812 813; Function Attrs: norecurse nounwind 814define void @cvsp2uw2qp(float %val, fp128* nocapture %res) { 815; CHECK-LABEL: cvsp2uw2qp: 816; CHECK: # %bb.0: # %entry 817; CHECK-NEXT: xscvdpuxws f0, f1 818; CHECK-NEXT: xxextractuw v2, vs0, 8 819; CHECK-NEXT: xscvudqp v2, v2 820; CHECK-NEXT: stxv v2, 0(r4) 821; CHECK-NEXT: blr 822entry: 823 %conv = fptoui float %val to i32 824 %conv1 = uitofp i32 %conv to fp128 825 store fp128 %conv1, fp128* %res, align 16 826 ret void 827} 828 829; Function Attrs: norecurse nounwind 830define void @cvsp2udw2qp(float %val, fp128* nocapture %res) { 831; CHECK-LABEL: cvsp2udw2qp: 832; CHECK: # %bb.0: # %entry 833; CHECK-NEXT: xscvdpuxds v2, f1 834; CHECK-NEXT: xscvudqp v2, v2 835; CHECK-NEXT: stxv v2, 0(r4) 836; CHECK-NEXT: blr 837entry: 838 %conv = fptoui float %val to i64 839 %conv1 = uitofp i64 %conv to fp128 840 store fp128 %conv1, fp128* %res, align 16 841 ret void 842} 843