1; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ 2; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 3 4; This test case checks r0 is used as constant 0 in instruction mtvsrdd. 5 6define <2 x i64> @const0(i64 %a) { 7 %vecinit = insertelement <2 x i64> undef, i64 %a, i32 0 8 %vecinit1 = insertelement <2 x i64> %vecinit, i64 0, i32 1 9 ret <2 x i64> %vecinit1 10; CHECK-LABEL: const0 11; CHECK: mtvsrdd v2, 0, r3 12} 13 14define <2 x i64> @noconst0(i64* %a, i64* %b) { 15 %1 = load i64, i64* %a, align 8 16 %2 = load i64, i64* %b, align 8 17 %vecinit = insertelement <2 x i64> undef, i64 %2, i32 0 18 %vecinit1 = insertelement <2 x i64> %vecinit, i64 %1, i32 1 19 ret <2 x i64> %vecinit1 20; CHECK-LABEL: noconst0 21; CHECK: mtvsrdd v2, {{r[0-9]+}}, {{r[0-9]+}} 22} 23