1; Test explicit register names. 2; 3; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -no-integrated-as \ 4; RUN: | FileCheck %s 5 6; Test i32 GPRs. 7define i32 @f1() { 8; CHECK-LABEL: f1: 9; CHECK: lhi %r4, 1 10; CHECK: blah %r4 11; CHECK: lr %r2, %r4 12; CHECK: br %r14 13 %ret = call i32 asm "blah $0", "={r4},0" (i32 1) 14 ret i32 %ret 15} 16 17; Test i64 GPRs. 18define i64 @f2() { 19; CHECK-LABEL: f2: 20; CHECK: lghi %r4, 1 21; CHECK: blah %r4 22; CHECK: lgr %r2, %r4 23; CHECK: br %r14 24 %ret = call i64 asm "blah $0", "={r4},0" (i64 1) 25 ret i64 %ret 26} 27 28; Test i32 FPRs. 29define float @f3() { 30; CHECK-LABEL: f3: 31; CHECK: lzer %f4 32; CHECK: blah %f4 33; CHECK: ler %f0, %f4 34; CHECK: br %r14 35 %ret = call float asm "blah $0", "={f4},0" (float 0.0) 36 ret float %ret 37} 38 39; Test i64 FPRs. 40define double @f4() { 41; CHECK-LABEL: f4: 42; CHECK: lzdr %f4 43; CHECK: blah %f4 44; CHECK: ldr %f0, %f4 45; CHECK: br %r14 46 %ret = call double asm "blah $0", "={f4},0" (double 0.0) 47 ret double %ret 48} 49 50; Test i128 FPRs. 51define void @f5(fp128 *%dest) { 52; CHECK-LABEL: f5: 53; CHECK: lzxr %f4 54; CHECK: blah %f4 55; CHECK-DAG: std %f4, 0(%r2) 56; CHECK-DAG: std %f6, 8(%r2) 57; CHECK: br %r14 58 %ret = call fp128 asm "blah $0", "={f4},0" (fp128 0xL00000000000000000000000000000000) 59 store fp128 %ret, fp128 *%dest 60 ret void 61} 62 63; Test clobbers of GPRs and CC. 64define i32 @f6(i32 %in) { 65; CHECK-LABEL: f6: 66; CHECK: lr [[REG:%r[01345]]], %r2 67; CHECK: blah 68; CHECK: lr %r2, [[REG]] 69; CHECK: br %r14 70 call void asm sideeffect "blah", "~{r2},~{cc}"() 71 ret i32 %in 72} 73 74; Test clobbers of FPRs and CC. 75define float @f7(float %in) { 76; CHECK-LABEL: f7: 77; CHECK: ler [[REG:%f[1-7]]], %f0 78; CHECK: blah 79; CHECK: ler %f0, [[REG]] 80; CHECK: br %r14 81 call void asm sideeffect "blah", "~{f0},~{cc}"() 82 ret float %in 83} 84 85; Test that both registers in a GR128 pair get hoisted. 86define void @f8(i32 %count) { 87; CHECK-LABEL: f8 88; CHECK-DAG: lhi %r0, 0 89; CHECK-DAG: lhi %r1, 1 90; CHECK: %loop 91; CHECK-NOT: %r 92; CHECK: blah %r0, %r1 93; CHECK: br %r14 94entry: 95 br label %loop 96 97loop: 98 %this = phi i32 [ %count, %entry ], [ %next, %loop ] 99 call void asm sideeffect "blah $0, $1", "{r0},{r1}" (i32 0, i32 1) 100 %next = sub i32 %this, 1 101 %cmp = icmp ne i32 %next, 0 102 br i1 %cmp, label %loop, label %exit 103 104exit: 105 ret void 106} 107