1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32 3# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64 4--- | 5 6 define i8 @test_zext_i1toi8(i1 %a) { 7 %r = zext i1 %a to i8 8 ret i8 %r 9 } 10 11 define i16 @test_zext_i1toi16(i1 %a) { 12 %r = zext i1 %a to i16 13 ret i16 %r 14 } 15 16 define i32 @test_zext_i1(i8 %a) { 17 %val = trunc i8 %a to i1 18 %r = zext i1 %val to i32 19 ret i32 %r 20 } 21 22 define i16 @test_zext_i8toi16(i8 %val) { 23 %r = zext i8 %val to i16 24 ret i16 %r 25 } 26 27 define i32 @test_zext_i8(i8 %val) { 28 %r = zext i8 %val to i32 29 ret i32 %r 30 } 31 32 define i32 @test_zext_i16(i16 %val) { 33 %r = zext i16 %val to i32 34 ret i32 %r 35 } 36 37 define i8 @test_sext_i1toi8(i1 %a) { 38 %r = sext i1 %a to i8 39 ret i8 %r 40 } 41 42 define i16 @test_sext_i1toi16(i1 %a) { 43 %r = sext i1 %a to i16 44 ret i16 %r 45 } 46 47 define i32 @test_sext_i1(i8 %a) { 48 %val = trunc i8 %a to i1 49 %r = sext i1 %val to i32 50 ret i32 %r 51 } 52 53 define i16 @test_sext_i8toi16(i8 %val) { 54 %r = sext i8 %val to i16 55 ret i16 %r 56 } 57 58 define i32 @test_sext_i8(i8 %val) { 59 %r = sext i8 %val to i32 60 ret i32 %r 61 } 62 63 define i32 @test_sext_i16(i16 %val) { 64 %r = sext i16 %val to i32 65 ret i32 %r 66 } 67 68 define void @test_anyext_i1toi8(i1 %a) { 69 ret void 70 } 71 72 define void @test_anyext_i1toi16(i1 %a) { 73 ret void 74 } 75 76 define void @test_anyext_i1(i8 %a) { 77 ret void 78 } 79 80 define void @test_anyext_i8toi16(i8 %val) { 81 ret void 82 } 83 84 define void @test_anyext_i8(i8 %val) { 85 ret void 86 } 87 88 define void @test_anyext_i16(i16 %val) { 89 ret void 90 } 91 92... 93--- 94name: test_zext_i1toi8 95alignment: 4 96legalized: false 97regBankSelected: false 98registers: 99 - { id: 0, class: _, preferred-register: '' } 100 - { id: 1, class: _, preferred-register: '' } 101 - { id: 2, class: _, preferred-register: '' } 102body: | 103 bb.1 (%ir-block.0): 104 liveins: $edi 105 106 ; X32-LABEL: name: test_zext_i1toi8 107 ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 108 ; X32: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 109 ; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 110 ; X32: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]] 111 ; X32: $al = COPY [[AND]](s8) 112 ; X32: RET 0, implicit $al 113 ; X64-LABEL: name: test_zext_i1toi8 114 ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 115 ; X64: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 116 ; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 117 ; X64: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]] 118 ; X64: $al = COPY [[AND]](s8) 119 ; X64: RET 0, implicit $al 120 %1:_(s32) = COPY $edi 121 %0:_(s1) = G_TRUNC %1(s32) 122 %2:_(s8) = G_ZEXT %0(s1) 123 $al = COPY %2(s8) 124 RET 0, implicit $al 125 126... 127--- 128name: test_zext_i1toi16 129alignment: 4 130legalized: false 131regBankSelected: false 132registers: 133 - { id: 0, class: _, preferred-register: '' } 134 - { id: 1, class: _, preferred-register: '' } 135body: | 136 bb.1 (%ir-block.0): 137 liveins: $edi 138 139 ; X32-LABEL: name: test_zext_i1toi16 140 ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 141 ; X32: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1 142 ; X32: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 143 ; X32: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]] 144 ; X32: $ax = COPY [[AND]](s16) 145 ; X32: RET 0, implicit $ax 146 ; X64-LABEL: name: test_zext_i1toi16 147 ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 148 ; X64: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1 149 ; X64: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 150 ; X64: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]] 151 ; X64: $ax = COPY [[AND]](s16) 152 ; X64: RET 0, implicit $ax 153 %1:_(s32) = COPY $edi 154 %0:_(s1) = G_TRUNC %1(s32) 155 %2:_(s16) = G_ZEXT %0(s1) 156 $ax = COPY %2(s16) 157 RET 0, implicit $ax 158 159... 160--- 161name: test_zext_i1 162alignment: 4 163legalized: false 164regBankSelected: false 165registers: 166 - { id: 0, class: _ } 167 - { id: 1, class: _ } 168 - { id: 2, class: _ } 169body: | 170 bb.1 (%ir-block.0): 171 liveins: $edi 172 173 ; X32-LABEL: name: test_zext_i1 174 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 175 ; X32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 176 ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 177 ; X32: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 178 ; X32: $eax = COPY [[AND]](s32) 179 ; X32: RET 0, implicit $eax 180 ; X64-LABEL: name: test_zext_i1 181 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 182 ; X64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 183 ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 184 ; X64: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 185 ; X64: $eax = COPY [[AND]](s32) 186 ; X64: RET 0, implicit $eax 187 %0(s8) = COPY $dil 188 %1(s1) = G_TRUNC %0(s8) 189 %2(s32) = G_ZEXT %1(s1) 190 $eax = COPY %2(s32) 191 RET 0, implicit $eax 192 193... 194--- 195name: test_zext_i8toi16 196alignment: 4 197legalized: false 198regBankSelected: false 199registers: 200 - { id: 0, class: _, preferred-register: '' } 201 - { id: 1, class: _, preferred-register: '' } 202body: | 203 bb.1 (%ir-block.0): 204 liveins: $edi 205 206 ; X32-LABEL: name: test_zext_i8toi16 207 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 208 ; X32: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[COPY]](s8) 209 ; X32: $ax = COPY [[ZEXT]](s16) 210 ; X32: RET 0, implicit $ax 211 ; X64-LABEL: name: test_zext_i8toi16 212 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 213 ; X64: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[COPY]](s8) 214 ; X64: $ax = COPY [[ZEXT]](s16) 215 ; X64: RET 0, implicit $ax 216 %0(s8) = COPY $dil 217 %1(s16) = G_ZEXT %0(s8) 218 $ax = COPY %1(s16) 219 RET 0, implicit $ax 220 221... 222--- 223name: test_zext_i8 224alignment: 4 225legalized: false 226regBankSelected: false 227registers: 228 - { id: 0, class: _ } 229 - { id: 1, class: _ } 230body: | 231 bb.1 (%ir-block.0): 232 liveins: $edi 233 234 ; X32-LABEL: name: test_zext_i8 235 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 236 ; X32: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s8) 237 ; X32: $eax = COPY [[ZEXT]](s32) 238 ; X32: RET 0, implicit $eax 239 ; X64-LABEL: name: test_zext_i8 240 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 241 ; X64: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s8) 242 ; X64: $eax = COPY [[ZEXT]](s32) 243 ; X64: RET 0, implicit $eax 244 %0(s8) = COPY $dil 245 %1(s32) = G_ZEXT %0(s8) 246 $eax = COPY %1(s32) 247 RET 0, implicit $eax 248 249... 250--- 251name: test_zext_i16 252alignment: 4 253legalized: false 254regBankSelected: false 255registers: 256 - { id: 0, class: _ } 257 - { id: 1, class: _ } 258body: | 259 bb.1 (%ir-block.0): 260 liveins: $edi 261 262 ; X32-LABEL: name: test_zext_i16 263 ; X32: [[COPY:%[0-9]+]]:_(s16) = COPY $di 264 ; X32: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s16) 265 ; X32: $eax = COPY [[ZEXT]](s32) 266 ; X32: RET 0, implicit $eax 267 ; X64-LABEL: name: test_zext_i16 268 ; X64: [[COPY:%[0-9]+]]:_(s16) = COPY $di 269 ; X64: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s16) 270 ; X64: $eax = COPY [[ZEXT]](s32) 271 ; X64: RET 0, implicit $eax 272 %0(s16) = COPY $di 273 %1(s32) = G_ZEXT %0(s16) 274 $eax = COPY %1(s32) 275 RET 0, implicit $eax 276 277... 278--- 279name: test_sext_i1toi8 280alignment: 4 281legalized: false 282regBankSelected: false 283registers: 284 - { id: 0, class: _, preferred-register: '' } 285 - { id: 1, class: _, preferred-register: '' } 286body: | 287 bb.1 (%ir-block.0): 288 liveins: $edi 289 290 ; X32-LABEL: name: test_sext_i1toi8 291 ; X32: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF 292 ; X32: $al = COPY [[DEF]](s8) 293 ; X32: RET 0, implicit $al 294 ; X64-LABEL: name: test_sext_i1toi8 295 ; X64: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF 296 ; X64: $al = COPY [[DEF]](s8) 297 ; X64: RET 0, implicit $al 298 %0(s1) = G_IMPLICIT_DEF 299 %1(s8) = G_SEXT %0(s1) 300 $al = COPY %1(s8) 301 RET 0, implicit $al 302 303... 304--- 305name: test_sext_i1toi16 306alignment: 4 307legalized: false 308regBankSelected: false 309registers: 310 - { id: 0, class: _, preferred-register: '' } 311 - { id: 1, class: _, preferred-register: '' } 312body: | 313 bb.1 (%ir-block.0): 314 liveins: $edi 315 316 ; X32-LABEL: name: test_sext_i1toi16 317 ; X32: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF 318 ; X32: $ax = COPY [[DEF]](s16) 319 ; X32: RET 0, implicit $ax 320 ; X64-LABEL: name: test_sext_i1toi16 321 ; X64: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF 322 ; X64: $ax = COPY [[DEF]](s16) 323 ; X64: RET 0, implicit $ax 324 %0(s1) = G_IMPLICIT_DEF 325 %1(s16) = G_SEXT %0(s1) 326 $ax = COPY %1(s16) 327 RET 0, implicit $ax 328 329... 330--- 331name: test_sext_i1 332alignment: 4 333legalized: false 334regBankSelected: false 335registers: 336 - { id: 0, class: _ } 337 - { id: 1, class: _ } 338 - { id: 2, class: _ } 339body: | 340 bb.1 (%ir-block.0): 341 liveins: $edi 342 343 ; X32-LABEL: name: test_sext_i1 344 ; X32: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 345 ; X32: $eax = COPY [[DEF]](s32) 346 ; X32: RET 0, implicit $eax 347 ; X64-LABEL: name: test_sext_i1 348 ; X64: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 349 ; X64: $eax = COPY [[DEF]](s32) 350 ; X64: RET 0, implicit $eax 351 %0(s1) = G_IMPLICIT_DEF 352 %2(s32) = G_SEXT %0(s1) 353 $eax = COPY %2(s32) 354 RET 0, implicit $eax 355 356... 357--- 358name: test_sext_i8toi16 359alignment: 4 360legalized: false 361regBankSelected: false 362registers: 363 - { id: 0, class: _, preferred-register: '' } 364 - { id: 1, class: _, preferred-register: '' } 365body: | 366 bb.1 (%ir-block.0): 367 liveins: $edi 368 369 ; X32-LABEL: name: test_sext_i8toi16 370 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 371 ; X32: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[COPY]](s8) 372 ; X32: $ax = COPY [[SEXT]](s16) 373 ; X32: RET 0, implicit $ax 374 ; X64-LABEL: name: test_sext_i8toi16 375 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 376 ; X64: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[COPY]](s8) 377 ; X64: $ax = COPY [[SEXT]](s16) 378 ; X64: RET 0, implicit $ax 379 %0(s8) = COPY $dil 380 %1(s16) = G_SEXT %0(s8) 381 $ax = COPY %1(s16) 382 RET 0, implicit $ax 383 384... 385--- 386name: test_sext_i8 387alignment: 4 388legalized: false 389regBankSelected: false 390registers: 391 - { id: 0, class: _ } 392 - { id: 1, class: _ } 393body: | 394 bb.1 (%ir-block.0): 395 liveins: $edi 396 397 ; X32-LABEL: name: test_sext_i8 398 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 399 ; X32: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s8) 400 ; X32: $eax = COPY [[SEXT]](s32) 401 ; X32: RET 0, implicit $eax 402 ; X64-LABEL: name: test_sext_i8 403 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 404 ; X64: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s8) 405 ; X64: $eax = COPY [[SEXT]](s32) 406 ; X64: RET 0, implicit $eax 407 %0(s8) = COPY $dil 408 %1(s32) = G_SEXT %0(s8) 409 $eax = COPY %1(s32) 410 RET 0, implicit $eax 411 412... 413--- 414name: test_sext_i16 415alignment: 4 416legalized: false 417regBankSelected: false 418registers: 419 - { id: 0, class: _ } 420 - { id: 1, class: _ } 421body: | 422 bb.1 (%ir-block.0): 423 liveins: $edi 424 425 ; X32-LABEL: name: test_sext_i16 426 ; X32: [[COPY:%[0-9]+]]:_(s16) = COPY $di 427 ; X32: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s16) 428 ; X32: $eax = COPY [[SEXT]](s32) 429 ; X32: RET 0, implicit $eax 430 ; X64-LABEL: name: test_sext_i16 431 ; X64: [[COPY:%[0-9]+]]:_(s16) = COPY $di 432 ; X64: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s16) 433 ; X64: $eax = COPY [[SEXT]](s32) 434 ; X64: RET 0, implicit $eax 435 %0(s16) = COPY $di 436 %1(s32) = G_SEXT %0(s16) 437 $eax = COPY %1(s32) 438 RET 0, implicit $eax 439 440... 441--- 442name: test_anyext_i1toi8 443alignment: 4 444legalized: false 445regBankSelected: false 446registers: 447 - { id: 0, class: _, preferred-register: '' } 448 - { id: 1, class: _, preferred-register: '' } 449 - { id: 2, class: _, preferred-register: '' } 450body: | 451 bb.1 (%ir-block.0): 452 liveins: $edi 453 454 ; X32-LABEL: name: test_anyext_i1toi8 455 ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 456 ; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 457 ; X32: $al = COPY [[TRUNC]](s8) 458 ; X32: RET 0, implicit $al 459 ; X64-LABEL: name: test_anyext_i1toi8 460 ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 461 ; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 462 ; X64: $al = COPY [[TRUNC]](s8) 463 ; X64: RET 0, implicit $al 464 %0(s32) = COPY $edi 465 %1(s1) = G_TRUNC %0(s32) 466 %2(s8) = G_ANYEXT %1(s1) 467 $al = COPY %2(s8) 468 RET 0, implicit $al 469 470... 471--- 472name: test_anyext_i1toi16 473alignment: 4 474legalized: false 475regBankSelected: false 476registers: 477 - { id: 0, class: _, preferred-register: '' } 478 - { id: 1, class: _, preferred-register: '' } 479 - { id: 2, class: _, preferred-register: '' } 480body: | 481 bb.1 (%ir-block.0): 482 liveins: $edi 483 484 ; X32-LABEL: name: test_anyext_i1toi16 485 ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 486 ; X32: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 487 ; X32: $ax = COPY [[TRUNC]](s16) 488 ; X32: RET 0, implicit $ax 489 ; X64-LABEL: name: test_anyext_i1toi16 490 ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 491 ; X64: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 492 ; X64: $ax = COPY [[TRUNC]](s16) 493 ; X64: RET 0, implicit $ax 494 %0(s32) = COPY $edi 495 %1(s1) = G_TRUNC %0(s32) 496 %2(s16) = G_ANYEXT %1(s1) 497 $ax = COPY %2(s16) 498 RET 0, implicit $ax 499 500... 501--- 502name: test_anyext_i1 503alignment: 4 504legalized: false 505regBankSelected: false 506registers: 507 - { id: 0, class: _ } 508 - { id: 1, class: _ } 509 - { id: 2, class: _ } 510body: | 511 bb.1 (%ir-block.0): 512 liveins: $edi 513 514 ; X32-LABEL: name: test_anyext_i1 515 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 516 ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 517 ; X32: $eax = COPY [[ANYEXT]](s32) 518 ; X32: RET 0, implicit $eax 519 ; X64-LABEL: name: test_anyext_i1 520 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 521 ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 522 ; X64: $eax = COPY [[ANYEXT]](s32) 523 ; X64: RET 0, implicit $eax 524 %0(s8) = COPY $dil 525 %1(s1) = G_TRUNC %0(s8) 526 %2(s32) = G_ANYEXT %1(s1) 527 $eax = COPY %2(s32) 528 RET 0, implicit $eax 529 530... 531--- 532name: test_anyext_i8toi16 533alignment: 4 534legalized: false 535regBankSelected: false 536registers: 537 - { id: 0, class: _, preferred-register: '' } 538 - { id: 1, class: _, preferred-register: '' } 539body: | 540 bb.1 (%ir-block.0): 541 liveins: $edi 542 543 ; X32-LABEL: name: test_anyext_i8toi16 544 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 545 ; X32: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8) 546 ; X32: $ax = COPY [[ANYEXT]](s16) 547 ; X32: RET 0, implicit $ax 548 ; X64-LABEL: name: test_anyext_i8toi16 549 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 550 ; X64: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8) 551 ; X64: $ax = COPY [[ANYEXT]](s16) 552 ; X64: RET 0, implicit $ax 553 %0(s8) = COPY $dil 554 %1(s16) = G_ANYEXT %0(s8) 555 $ax = COPY %1(s16) 556 RET 0, implicit $ax 557 558... 559--- 560name: test_anyext_i8 561alignment: 4 562legalized: false 563regBankSelected: false 564registers: 565 - { id: 0, class: _ } 566 - { id: 1, class: _ } 567body: | 568 bb.1 (%ir-block.0): 569 liveins: $edi 570 571 ; X32-LABEL: name: test_anyext_i8 572 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 573 ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 574 ; X32: $eax = COPY [[ANYEXT]](s32) 575 ; X32: RET 0, implicit $eax 576 ; X64-LABEL: name: test_anyext_i8 577 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 578 ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8) 579 ; X64: $eax = COPY [[ANYEXT]](s32) 580 ; X64: RET 0, implicit $eax 581 %0(s8) = COPY $dil 582 %1(s32) = G_ANYEXT %0(s8) 583 $eax = COPY %1(s32) 584 RET 0, implicit $eax 585 586... 587--- 588name: test_anyext_i16 589alignment: 4 590legalized: false 591regBankSelected: false 592registers: 593 - { id: 0, class: _ } 594 - { id: 1, class: _ } 595body: | 596 bb.1 (%ir-block.0): 597 liveins: $edi 598 599 ; X32-LABEL: name: test_anyext_i16 600 ; X32: [[COPY:%[0-9]+]]:_(s16) = COPY $di 601 ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s16) 602 ; X32: $eax = COPY [[ANYEXT]](s32) 603 ; X32: RET 0, implicit $eax 604 ; X64-LABEL: name: test_anyext_i16 605 ; X64: [[COPY:%[0-9]+]]:_(s16) = COPY $di 606 ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s16) 607 ; X64: $eax = COPY [[ANYEXT]](s32) 608 ; X64: RET 0, implicit $eax 609 %0(s16) = COPY $di 610 %1(s32) = G_ANYEXT %0(s16) 611 $eax = COPY %1(s32) 612 RET 0, implicit $eax 613 614... 615