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1# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx                -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX
2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl  -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL
3--- |
4  define void @test_insert_128_idx0() {
5    ret void
6  }
7
8  define void @test_insert_128_idx0_undef() {
9    ret void
10  }
11
12  define void @test_insert_128_idx1() {
13    ret void
14  }
15
16  define void @test_insert_128_idx1_undef() {
17    ret void
18  }
19
20...
21---
22name:            test_insert_128_idx0
23# ALL-LABEL: name:  test_insert_128_idx0
24alignment:       4
25legalized:       true
26regBankSelected: true
27registers:
28  - { id: 0, class: vecr }
29  - { id: 1, class: vecr }
30  - { id: 2, class: vecr }
31# AVX:               %0:vr256 = COPY $ymm0
32# AVX-NEXT:          %1:vr128 = COPY $xmm1
33# AVX-NEXT:          %2:vr256 = VINSERTF128rr %0, %1, 0
34# AVX-NEXT:          $ymm0 = COPY %2
35# AVX-NEXT:          RET 0, implicit $ymm0
36#
37# AVX512VL:          %0:vr256x = COPY $ymm0
38# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
39# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rr %0, %1, 0
40# AVX512VL-NEXT:     $ymm0 = COPY %2
41# AVX512VL-NEXT:     RET 0, implicit $ymm0
42body:             |
43  bb.1 (%ir-block.0):
44    liveins: $ymm0, $ymm1
45
46    %0(<8 x s32>) = COPY $ymm0
47    %1(<4 x s32>) = COPY $xmm1
48    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 0
49    $ymm0 = COPY %2(<8 x s32>)
50    RET 0, implicit $ymm0
51
52...
53---
54name:            test_insert_128_idx0_undef
55# ALL-LABEL: name:  test_insert_128_idx0_undef
56alignment:       4
57legalized:       true
58regBankSelected: true
59registers:
60  - { id: 0, class: vecr }
61  - { id: 1, class: vecr }
62  - { id: 2, class: vecr }
63# AVX:               %1:vr128 = COPY $xmm1
64# AVX-NEXT:          undef %2.sub_xmm:vr256 = COPY %1
65# AVX-NEXT:          $ymm0 = COPY %2
66# AVX-NEXT:          RET 0, implicit $ymm0
67#
68# AVX512VL:          %1:vr128x = COPY $xmm1
69# AVX512VL-NEXT:     undef %2.sub_xmm:vr256x = COPY %1
70# AVX512VL-NEXT:     $ymm0 = COPY %2
71# AVX512VL-NEXT:     RET 0, implicit $ymm0
72body:             |
73  bb.1 (%ir-block.0):
74    liveins: $ymm0, $ymm1
75
76    %0(<8 x s32>) = IMPLICIT_DEF
77    %1(<4 x s32>) = COPY $xmm1
78    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 0
79    $ymm0 = COPY %2(<8 x s32>)
80    RET 0, implicit $ymm0
81
82...
83---
84name:            test_insert_128_idx1
85# ALL-LABEL: name:  test_insert_128_idx1
86alignment:       4
87legalized:       true
88regBankSelected: true
89registers:
90  - { id: 0, class: vecr }
91  - { id: 1, class: vecr }
92  - { id: 2, class: vecr }
93# AVX:               %0:vr256 = COPY $ymm0
94# AVX-NEXT:          %1:vr128 = COPY $xmm1
95# AVX-NEXT:          %2:vr256 = VINSERTF128rr %0, %1, 1
96# AVX-NEXT:          $ymm0 = COPY %2
97# AVX-NEXT:          RET 0, implicit $ymm0
98#
99# AVX512VL:          %0:vr256x = COPY $ymm0
100# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
101# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rr %0, %1, 1
102# AVX512VL-NEXT:     $ymm0 = COPY %2
103# AVX512VL-NEXT:     RET 0, implicit $ymm0
104body:             |
105  bb.1 (%ir-block.0):
106    liveins: $ymm0, $ymm1
107
108    %0(<8 x s32>) = COPY $ymm0
109    %1(<4 x s32>) = COPY $xmm1
110    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 128
111    $ymm0 = COPY %2(<8 x s32>)
112    RET 0, implicit $ymm0
113...
114---
115name:            test_insert_128_idx1_undef
116# ALL-LABEL: name:  test_insert_128_idx1_undef
117alignment:       4
118legalized:       true
119regBankSelected: true
120registers:
121  - { id: 0, class: vecr }
122  - { id: 1, class: vecr }
123  - { id: 2, class: vecr }
124# AVX:               %0:vr256 = IMPLICIT_DEF
125# AVX-NEXT:          %1:vr128 = COPY $xmm1
126# AVX-NEXT:          %2:vr256 = VINSERTF128rr %0, %1, 1
127# AVX-NEXT:          $ymm0 = COPY %2
128# AVX-NEXT:          RET 0, implicit $ymm0
129#
130# AVX512VL:          %0:vr256x = IMPLICIT_DEF
131# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
132# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rr %0, %1, 1
133# AVX512VL-NEXT:     $ymm0 = COPY %2
134# AVX512VL-NEXT:     RET 0, implicit $ymm0
135body:             |
136  bb.1 (%ir-block.0):
137    liveins: $ymm0, $ymm1
138
139    %0(<8 x s32>) = IMPLICIT_DEF
140    %1(<4 x s32>) = COPY $xmm1
141    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 128
142    $ymm0 = COPY %2(<8 x s32>)
143    RET 0, implicit $ymm0
144...
145