1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX 3# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX512VL 4--- | 5 define void @test_merge() { 6 ret void 7 } 8... 9--- 10name: test_merge 11# 12alignment: 4 13legalized: true 14regBankSelected: true 15# 16registers: 17 - { id: 0, class: vecr } 18 - { id: 1, class: vecr } 19# 20body: | 21 bb.1 (%ir-block.0): 22 23 ; AVX-LABEL: name: test_merge 24 ; AVX: [[DEF:%[0-9]+]]:vr128 = IMPLICIT_DEF 25 ; AVX: undef %2.sub_xmm:vr256 = COPY [[DEF]] 26 ; AVX: [[VINSERTF128rr:%[0-9]+]]:vr256 = VINSERTF128rr %2, [[DEF]], 1 27 ; AVX: $ymm0 = COPY [[VINSERTF128rr]] 28 ; AVX: RET 0, implicit $ymm0 29 ; AVX512VL-LABEL: name: test_merge 30 ; AVX512VL: [[DEF:%[0-9]+]]:vr128x = IMPLICIT_DEF 31 ; AVX512VL: undef %2.sub_xmm:vr256x = COPY [[DEF]] 32 ; AVX512VL: [[VINSERTF32x4Z256rr:%[0-9]+]]:vr256x = VINSERTF32x4Z256rr %2, [[DEF]], 1 33 ; AVX512VL: $ymm0 = COPY [[VINSERTF32x4Z256rr]] 34 ; AVX512VL: RET 0, implicit $ymm0 35 %0(<4 x s32>) = IMPLICIT_DEF 36 %1(<8 x s32>) = G_MERGE_VALUES %0(<4 x s32>), %0(<4 x s32>) 37 $ymm0 = COPY %1(<8 x s32>) 38 RET 0, implicit $ymm0 39 40... 41 42