1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=yonah < %s | FileCheck %s 3 4define fastcc void @t1() nounwind { 5; CHECK-LABEL: t1: 6; CHECK: ## %bb.0: ## %entry 7; CHECK-NEXT: subl $16, %esp 8; CHECK-NEXT: pushl $188 9; CHECK-NEXT: pushl $0 10; CHECK-NEXT: pushl $0 11; CHECK-NEXT: calll _memset 12; CHECK-NEXT: addl $16, %esp 13entry: 14 call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i1 false) 15 unreachable 16} 17 18define fastcc void @t2(i8 signext %c) nounwind { 19; CHECK-LABEL: t2: 20; CHECK: ## %bb.0: ## %entry 21; CHECK-NEXT: subl $12, %esp 22; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp) 23; CHECK-NEXT: movl $76, {{[0-9]+}}(%esp) 24; CHECK-NEXT: calll _memset 25entry: 26 call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i1 false) 27 unreachable 28} 29 30declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind 31 32define void @t3(i8* nocapture %s, i8 %a) nounwind { 33; CHECK-LABEL: t3: 34; CHECK: ## %bb.0: ## %entry 35; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 36; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 37; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101 38; CHECK-NEXT: movl %ecx, 4(%eax) 39; CHECK-NEXT: movl %ecx, (%eax) 40; CHECK-NEXT: retl 41entry: 42 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i1 false) 43 ret void 44} 45 46define void @t4(i8* nocapture %s, i8 %a) nounwind { 47; CHECK-LABEL: t4: 48; CHECK: ## %bb.0: ## %entry 49; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 50; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 51; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101 52; CHECK-NEXT: movl %ecx, 8(%eax) 53; CHECK-NEXT: movl %ecx, 4(%eax) 54; CHECK-NEXT: movl %ecx, (%eax) 55; CHECK-NEXT: movw %cx, 12(%eax) 56; CHECK-NEXT: movb %cl, 14(%eax) 57; CHECK-NEXT: retl 58entry: 59 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i1 false) 60 ret void 61} 62