1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 4 5@a = external global i32 6@b = external global i32 7@c = external global i32 8 9define i32 @fn1(i32, i32) { 10; X86-LABEL: fn1: 11; X86: # %bb.0: 12; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 13; X86-NEXT: testl %eax, %eax 14; X86-NEXT: je .LBB0_2 15; X86-NEXT: # %bb.1: 16; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 17; X86-NEXT: .LBB0_2: 18; X86-NEXT: retl 19; 20; X64-LABEL: fn1: 21; X64: # %bb.0: 22; X64-NEXT: testl %esi, %esi 23; X64-NEXT: cmovel %esi, %edi 24; X64-NEXT: movl %edi, %eax 25; X64-NEXT: retq 26 %3 = icmp ne i32 %1, 0 27 %4 = select i1 %3, i32 %0, i32 0 28 ret i32 %4 29} 30 31define void @fn2() { 32; X86-LABEL: fn2: 33; X86: # %bb.0: 34; X86-NEXT: movl b, %eax 35; X86-NEXT: decl a 36; X86-NEXT: jne .LBB1_2 37; X86-NEXT: # %bb.1: 38; X86-NEXT: xorl %eax, %eax 39; X86-NEXT: .LBB1_2: 40; X86-NEXT: movl %eax, c 41; X86-NEXT: retl 42; 43; X64-LABEL: fn2: 44; X64: # %bb.0: 45; X64-NEXT: xorl %eax, %eax 46; X64-NEXT: decl {{.*}}(%rip) 47; X64-NEXT: je .LBB1_2 48; X64-NEXT: # %bb.1: 49; X64-NEXT: movl {{.*}}(%rip), %eax 50; X64-NEXT: .LBB1_2: 51; X64-NEXT: movl %eax, {{.*}}(%rip) 52; X64-NEXT: retq 53 %1 = load volatile i32, i32* @b, align 4 54 %2 = load i32, i32* @a, align 4 55 %3 = add nsw i32 %2, -1 56 store i32 %3, i32* @a, align 4 57 %4 = icmp ne i32 %3, 0 58 %5 = select i1 %4, i32 %1, i32 0 59 store i32 %5, i32* @c, align 4 60 ret void 61} 62 63