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1@ RUN: llvm-mc -disassemble -triple thumb -mcpu=cyclone %s | FileCheck %s
2
3[0xe0,0xf3,0x20,0x82]
4[0xe1,0xf3,0x20,0x83]
5[0xe2,0xf3,0x20,0x85]
6[0xe3,0xf3,0x20,0x87]
7[0xe4,0xf3,0x20,0x8b]
8[0xe5,0xf3,0x20,0x81]
9[0xe6,0xf3,0x20,0x82]
10@ CHECK:         mrs     r2, r8_usr
11@ CHECK:         mrs     r3, r9_usr
12@ CHECK:         mrs     r5, r10_usr
13@ CHECK:         mrs     r7, r11_usr
14@ CHECK:         mrs     r11, r12_usr
15@ CHECK:         mrs     r1, sp_usr
16@ CHECK:         mrs     r2, lr_usr
17
18[0xe8,0xf3,0x20,0x82]
19[0xe9,0xf3,0x20,0x83]
20[0xea,0xf3,0x20,0x85]
21[0xeb,0xf3,0x20,0x87]
22[0xec,0xf3,0x20,0x8b]
23[0xed,0xf3,0x20,0x81]
24[0xee,0xf3,0x20,0x82]
25[0xfe,0xf3,0x20,0x83]
26@ CHECK:         mrs     r2, r8_fiq
27@ CHECK:         mrs     r3, r9_fiq
28@ CHECK:         mrs     r5, r10_fiq
29@ CHECK:         mrs     r7, r11_fiq
30@ CHECK:         mrs     r11, r12_fiq
31@ CHECK:         mrs     r1, sp_fiq
32@ CHECK:         mrs     r2, lr_fiq
33@ CHECK:         mrs     r3, SPSR_fiq
34
35[0xe0,0xf3,0x30,0x84]
36[0xe1,0xf3,0x30,0x89]
37[0xf0,0xf3,0x30,0x81]
38@ CHECK:         mrs     r4, lr_irq
39@ CHECK:         mrs     r9, sp_irq
40@ CHECK:         mrs     r1, SPSR_irq
41
42[0xe2,0xf3,0x30,0x81]
43[0xe3,0xf3,0x30,0x83]
44[0xf2,0xf3,0x30,0x85]
45@ CHECK:         mrs     r1, lr_svc
46@ CHECK:         mrs     r3, sp_svc
47@ CHECK:         mrs     r5, SPSR_svc
48
49[0xe4,0xf3,0x30,0x85]
50[0xe5,0xf3,0x30,0x87]
51[0xf4,0xf3,0x30,0x89]
52@ CHECK:         mrs     r5, lr_abt
53@ CHECK:         mrs     r7, sp_abt
54@ CHECK:         mrs     r9, SPSR_abt
55
56[0xe6,0xf3,0x30,0x89]
57[0xe7,0xf3,0x30,0x8b]
58[0xf6,0xf3,0x30,0x8c]
59@ CHECK:         mrs     r9, lr_und
60@ CHECK:         mrs     r11, sp_und
61@ CHECK:         mrs     r12, SPSR_und
62
63
64[0xec,0xf3,0x30,0x82]
65[0xed,0xf3,0x30,0x84]
66[0xfc,0xf3,0x30,0x86]
67@ CHECK:         mrs     r2, lr_mon
68@ CHECK:         mrs     r4, sp_mon
69@ CHECK:         mrs     r6, SPSR_mon
70
71
72[0xee,0xf3,0x30,0x86]
73[0xef,0xf3,0x30,0x88]
74[0xfe,0xf3,0x30,0x8a]
75@ CHECK:         mrs     r6, elr_hyp
76@ CHECK:         mrs     r8, sp_hyp
77@ CHECK:         mrs     r10, SPSR_hyp
78
79
80[0x82,0xf3,0x20,0x80]
81[0x83,0xf3,0x20,0x81]
82[0x85,0xf3,0x20,0x82]
83[0x87,0xf3,0x20,0x83]
84[0x8b,0xf3,0x20,0x84]
85[0x81,0xf3,0x20,0x85]
86[0x82,0xf3,0x20,0x86]
87@ CHECK:         msr     r8_usr, r2
88@ CHECK:         msr     r9_usr, r3
89@ CHECK:         msr     r10_usr, r5
90@ CHECK:         msr     r11_usr, r7
91@ CHECK:         msr     r12_usr, r11
92@ CHECK:         msr     sp_usr, r1
93@ CHECK:         msr     lr_usr, r2
94
95[0x82,0xf3,0x20,0x88]
96[0x83,0xf3,0x20,0x89]
97[0x85,0xf3,0x20,0x8a]
98[0x87,0xf3,0x20,0x8b]
99[0x8b,0xf3,0x20,0x8c]
100[0x81,0xf3,0x20,0x8d]
101[0x82,0xf3,0x20,0x8e]
102[0x93,0xf3,0x20,0x8e]
103@ CHECK:         msr     r8_fiq, r2
104@ CHECK:         msr     r9_fiq, r3
105@ CHECK:         msr     r10_fiq, r5
106@ CHECK:         msr     r11_fiq, r7
107@ CHECK:         msr     r12_fiq, r11
108@ CHECK:         msr     sp_fiq, r1
109@ CHECK:         msr     lr_fiq, r2
110@ CHECK:        msr     SPSR_fiq, r3
111
112[0x84,0xf3,0x30,0x80]
113[0x89,0xf3,0x30,0x81]
114[0x9b,0xf3,0x30,0x80]
115@ CHECK:         msr     lr_irq, r4
116@ CHECK:         msr     sp_irq, r9
117@ CHECK:         msr     SPSR_irq, r11
118
119[0x81,0xf3,0x30,0x82]
120[0x83,0xf3,0x30,0x83]
121[0x95,0xf3,0x30,0x82]
122@ CHECK:         msr     lr_svc, r1
123@ CHECK:         msr     sp_svc, r3
124@ CHECK:         msr     SPSR_svc, r5
125
126[0x85,0xf3,0x30,0x84]
127[0x87,0xf3,0x30,0x85]
128[0x99,0xf3,0x30,0x84]
129@ CHECK:         msr     lr_abt, r5
130@ CHECK:         msr     sp_abt, r7
131@ CHECK:         msr     SPSR_abt, r9
132
133[0x89,0xf3,0x30,0x86]
134[0x8b,0xf3,0x30,0x87]
135[0x9c,0xf3,0x30,0x86]
136@ CHECK:         msr     lr_und, r9
137@ CHECK:         msr     sp_und, r11
138@ CHECK:         msr     SPSR_und, r12
139
140
141[0x82,0xf3,0x30,0x8c]
142[0x84,0xf3,0x30,0x8d]
143[0x96,0xf3,0x30,0x8c]
144@ CHECK:         msr     lr_mon, r2
145@ CHECK:         msr     sp_mon, r4
146@ CHECK:         msr     SPSR_mon, r6
147
148[0x86,0xf3,0x30,0x8e]
149[0x88,0xf3,0x30,0x8f]
150[0x9a,0xf3,0x30,0x8e]
151@ CHECK:         msr     elr_hyp, r6
152@ CHECK:         msr     sp_hyp, r8
153@ CHECK:         msr     SPSR_hyp, r10
154