1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4define i32 @main1(i32 %argc) { 5; CHECK-LABEL: @main1( 6; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 3 7; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3 8; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1 9; CHECK-NEXT: ret i32 [[RETVAL_0]] 10; 11 %and = and i32 %argc, 1 12 %tobool = icmp ne i32 %and, 0 13 %and2 = and i32 %argc, 2 14 %tobool3 = icmp ne i32 %and2, 0 15 %or.cond = and i1 %tobool, %tobool3 16 %retval.0 = select i1 %or.cond, i32 2, i32 1 17 ret i32 %retval.0 18} 19 20define i32 @main2(i32 %argc) { 21; CHECK-LABEL: @main2( 22; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 3 23; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 3 24; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 25; CHECK-NEXT: ret i32 [[STOREMERGE]] 26; 27 %and = and i32 %argc, 1 28 %tobool = icmp eq i32 %and, 0 29 %and2 = and i32 %argc, 2 30 %tobool3 = icmp eq i32 %and2, 0 31 %or.cond = or i1 %tobool, %tobool3 32 %storemerge = select i1 %or.cond, i32 0, i32 1 33 ret i32 %storemerge 34} 35 36; tests to check combining (icmp eq (A & B), C) & (icmp eq (A & D), E) 37; tests to check if (icmp eq (A & B), 0) is treated like (icmp eq (A & B), B) 38; if B is a single bit constant 39 40; (icmp eq (A & B), 0) & (icmp eq (A & D), 0) -> (icmp eq (A & (B|D)), 0) 41define i32 @main3(i32 %argc) { 42; CHECK-LABEL: @main3( 43; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 44; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 0 45; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 46; CHECK-NEXT: ret i32 [[STOREMERGE]] 47; 48 %and = and i32 %argc, 7 49 %tobool = icmp eq i32 %and, 0 50 %and2 = and i32 %argc, 48 51 %tobool3 = icmp eq i32 %and2, 0 52 %and.cond = and i1 %tobool, %tobool3 53 %storemerge = select i1 %and.cond, i32 0, i32 1 54 ret i32 %storemerge 55} 56 57define i32 @main3b(i32 %argc) { 58; CHECK-LABEL: @main3b( 59; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 60; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 0 61; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 62; CHECK-NEXT: ret i32 [[STOREMERGE]] 63; 64 %and = and i32 %argc, 7 65 %tobool = icmp eq i32 %and, 0 66 %and2 = and i32 %argc, 16 67 %tobool3 = icmp ne i32 %and2, 16 68 %and.cond = and i1 %tobool, %tobool3 69 %storemerge = select i1 %and.cond, i32 0, i32 1 70 ret i32 %storemerge 71} 72 73define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3) { 74; CHECK-LABEL: @main3e_like( 75; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 76; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 77; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], 0 78; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 79; CHECK-NEXT: ret i32 [[STOREMERGE]] 80; 81 %and = and i32 %argc, %argc2 82 %tobool = icmp eq i32 %and, 0 83 %and2 = and i32 %argc, %argc3 84 %tobool3 = icmp eq i32 %and2, 0 85 %and.cond = and i1 %tobool, %tobool3 86 %storemerge = select i1 %and.cond, i32 0, i32 1 87 ret i32 %storemerge 88} 89 90; (icmp ne (A & B), 0) | (icmp ne (A & D), 0) -> (icmp ne (A & (B|D)), 0) 91define i32 @main3c(i32 %argc) { 92; CHECK-LABEL: @main3c( 93; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 94; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 0 95; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 96; CHECK-NEXT: ret i32 [[STOREMERGE]] 97; 98 %and = and i32 %argc, 7 99 %tobool = icmp ne i32 %and, 0 100 %and2 = and i32 %argc, 48 101 %tobool3 = icmp ne i32 %and2, 0 102 %or.cond = or i1 %tobool, %tobool3 103 %storemerge = select i1 %or.cond, i32 0, i32 1 104 ret i32 %storemerge 105} 106 107define i32 @main3d(i32 %argc) { 108; CHECK-LABEL: @main3d( 109; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 110; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 0 111; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 112; CHECK-NEXT: ret i32 [[STOREMERGE]] 113; 114 %and = and i32 %argc, 7 115 %tobool = icmp ne i32 %and, 0 116 %and2 = and i32 %argc, 16 117 %tobool3 = icmp eq i32 %and2, 16 118 %or.cond = or i1 %tobool, %tobool3 119 %storemerge = select i1 %or.cond, i32 0, i32 1 120 ret i32 %storemerge 121} 122 123define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3) { 124; CHECK-LABEL: @main3f_like( 125; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 126; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 127; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP2]], 0 128; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 129; CHECK-NEXT: ret i32 [[STOREMERGE]] 130; 131 %and = and i32 %argc, %argc2 132 %tobool = icmp ne i32 %and, 0 133 %and2 = and i32 %argc, %argc3 134 %tobool3 = icmp ne i32 %and2, 0 135 %or.cond = or i1 %tobool, %tobool3 136 %storemerge = select i1 %or.cond, i32 0, i32 1 137 ret i32 %storemerge 138} 139 140; (icmp eq (A & B), B) & (icmp eq (A & D), D) -> (icmp eq (A & (B|D)), (B|D)) 141define i32 @main4(i32 %argc) { 142; CHECK-LABEL: @main4( 143; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 144; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 55 145; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 146; CHECK-NEXT: ret i32 [[STOREMERGE]] 147; 148 %and = and i32 %argc, 7 149 %tobool = icmp eq i32 %and, 7 150 %and2 = and i32 %argc, 48 151 %tobool3 = icmp eq i32 %and2, 48 152 %and.cond = and i1 %tobool, %tobool3 153 %storemerge = select i1 %and.cond, i32 0, i32 1 154 ret i32 %storemerge 155} 156 157define i32 @main4b(i32 %argc) { 158; CHECK-LABEL: @main4b( 159; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 160; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 23 161; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 162; CHECK-NEXT: ret i32 [[STOREMERGE]] 163; 164 %and = and i32 %argc, 7 165 %tobool = icmp eq i32 %and, 7 166 %and2 = and i32 %argc, 16 167 %tobool3 = icmp ne i32 %and2, 0 168 %and.cond = and i1 %tobool, %tobool3 169 %storemerge = select i1 %and.cond, i32 0, i32 1 170 ret i32 %storemerge 171} 172 173define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3) { 174; CHECK-LABEL: @main4e_like( 175; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 176; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 177; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 178; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 179; CHECK-NEXT: ret i32 [[STOREMERGE]] 180; 181 %and = and i32 %argc, %argc2 182 %tobool = icmp eq i32 %and, %argc2 183 %and2 = and i32 %argc, %argc3 184 %tobool3 = icmp eq i32 %and2, %argc3 185 %and.cond = and i1 %tobool, %tobool3 186 %storemerge = select i1 %and.cond, i32 0, i32 1 187 ret i32 %storemerge 188} 189 190; (icmp ne (A & B), B) | (icmp ne (A & D), D) -> (icmp ne (A & (B|D)), (B|D)) 191define i32 @main4c(i32 %argc) { 192; CHECK-LABEL: @main4c( 193; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 194; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 55 195; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 196; CHECK-NEXT: ret i32 [[STOREMERGE]] 197; 198 %and = and i32 %argc, 7 199 %tobool = icmp ne i32 %and, 7 200 %and2 = and i32 %argc, 48 201 %tobool3 = icmp ne i32 %and2, 48 202 %or.cond = or i1 %tobool, %tobool3 203 %storemerge = select i1 %or.cond, i32 0, i32 1 204 ret i32 %storemerge 205} 206 207define i32 @main4d(i32 %argc) { 208; CHECK-LABEL: @main4d( 209; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 210; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 23 211; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 212; CHECK-NEXT: ret i32 [[STOREMERGE]] 213; 214 %and = and i32 %argc, 7 215 %tobool = icmp ne i32 %and, 7 216 %and2 = and i32 %argc, 16 217 %tobool3 = icmp eq i32 %and2, 0 218 %or.cond = or i1 %tobool, %tobool3 219 %storemerge = select i1 %or.cond, i32 0, i32 1 220 ret i32 %storemerge 221} 222 223define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3) { 224; CHECK-LABEL: @main4f_like( 225; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 226; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 227; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]] 228; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 229; CHECK-NEXT: ret i32 [[STOREMERGE]] 230; 231 %and = and i32 %argc, %argc2 232 %tobool = icmp ne i32 %and, %argc2 233 %and2 = and i32 %argc, %argc3 234 %tobool3 = icmp ne i32 %and2, %argc3 235 %or.cond = or i1 %tobool, %tobool3 236 %storemerge = select i1 %or.cond, i32 0, i32 1 237 ret i32 %storemerge 238} 239 240; (icmp eq (A & B), A) & (icmp eq (A & D), A) -> (icmp eq (A & (B&D)), A) 241define i32 @main5_like(i32 %argc, i32 %argc2) { 242; CHECK-LABEL: @main5_like( 243; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, %argc2 244; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7 245; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], 7 246; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 247; CHECK-NEXT: ret i32 [[STOREMERGE]] 248; 249 %and = and i32 %argc, 7 250 %tobool = icmp eq i32 %and, 7 251 %and2 = and i32 %argc2, 7 252 %tobool3 = icmp eq i32 %and2, 7 253 %and.cond = and i1 %tobool, %tobool3 254 %storemerge = select i1 %and.cond, i32 0, i32 1 255 ret i32 %storemerge 256} 257 258define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3) { 259; CHECK-LABEL: @main5e_like( 260; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc2, %argc3 261; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 262; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], %argc 263; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 264; CHECK-NEXT: ret i32 [[STOREMERGE]] 265; 266 %and = and i32 %argc, %argc2 267 %tobool = icmp eq i32 %and, %argc 268 %and2 = and i32 %argc, %argc3 269 %tobool3 = icmp eq i32 %and2, %argc 270 %and.cond = and i1 %tobool, %tobool3 271 %storemerge = select i1 %and.cond, i32 0, i32 1 272 ret i32 %storemerge 273} 274 275; (icmp ne (A & B), A) | (icmp ne (A & D), A) -> (icmp ne (A & (B&D)), A) 276define i32 @main5c_like(i32 %argc, i32 %argc2) { 277; CHECK-LABEL: @main5c_like( 278; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, %argc2 279; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7 280; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP2]], 7 281; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 282; CHECK-NEXT: ret i32 [[STOREMERGE]] 283; 284 %and = and i32 %argc, 7 285 %tobool = icmp ne i32 %and, 7 286 %and2 = and i32 %argc2, 7 287 %tobool3 = icmp ne i32 %and2, 7 288 %or.cond = or i1 %tobool, %tobool3 289 %storemerge = select i1 %or.cond, i32 0, i32 1 290 ret i32 %storemerge 291} 292 293define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3) { 294; CHECK-LABEL: @main5f_like( 295; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc2, %argc3 296; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 297; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP2]], %argc 298; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 299; CHECK-NEXT: ret i32 [[STOREMERGE]] 300; 301 %and = and i32 %argc, %argc2 302 %tobool = icmp ne i32 %and, %argc 303 %and2 = and i32 %argc, %argc3 304 %tobool3 = icmp ne i32 %and2, %argc 305 %or.cond = or i1 %tobool, %tobool3 306 %storemerge = select i1 %or.cond, i32 0, i32 1 307 ret i32 %storemerge 308} 309 310; (icmp eq (A & B), C) & (icmp eq (A & D), E) -> (icmp eq (A & (B|D)), (C|E)) 311; if B, C, D, E are constant, and it's possible 312define i32 @main6(i32 %argc) { 313; CHECK-LABEL: @main6( 314; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 315; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 19 316; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 317; CHECK-NEXT: ret i32 [[STOREMERGE]] 318; 319 %and = and i32 %argc, 7 320 %tobool = icmp eq i32 %and, 3 321 %and2 = and i32 %argc, 48 322 %tobool3 = icmp eq i32 %and2, 16 323 %and.cond = and i1 %tobool, %tobool3 324 %storemerge = select i1 %and.cond, i32 0, i32 1 325 ret i32 %storemerge 326} 327 328define i32 @main6b(i32 %argc) { 329; CHECK-LABEL: @main6b( 330; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 331; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP1]], 19 332; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 333; CHECK-NEXT: ret i32 [[STOREMERGE]] 334; 335 %and = and i32 %argc, 7 336 %tobool = icmp eq i32 %and, 3 337 %and2 = and i32 %argc, 16 338 %tobool3 = icmp ne i32 %and2, 0 339 %and.cond = and i1 %tobool, %tobool3 340 %storemerge = select i1 %and.cond, i32 0, i32 1 341 ret i32 %storemerge 342} 343 344; (icmp ne (A & B), C) | (icmp ne (A & D), E) -> (icmp ne (A & (B|D)), (C|E)) 345; if B, C, D, E are constant, and it's possible 346define i32 @main6c(i32 %argc) { 347; CHECK-LABEL: @main6c( 348; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 55 349; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 19 350; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 351; CHECK-NEXT: ret i32 [[STOREMERGE]] 352; 353 %and = and i32 %argc, 7 354 %tobool = icmp ne i32 %and, 3 355 %and2 = and i32 %argc, 48 356 %tobool3 = icmp ne i32 %and2, 16 357 %or.cond = or i1 %tobool, %tobool3 358 %storemerge = select i1 %or.cond, i32 0, i32 1 359 ret i32 %storemerge 360} 361 362define i32 @main6d(i32 %argc) { 363; CHECK-LABEL: @main6d( 364; CHECK-NEXT: [[TMP1:%.*]] = and i32 %argc, 23 365; CHECK-NEXT: [[NOT_:%.*]] = icmp eq i32 [[TMP1]], 19 366; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 367; CHECK-NEXT: ret i32 [[STOREMERGE]] 368; 369 %and = and i32 %argc, 7 370 %tobool = icmp ne i32 %and, 3 371 %and2 = and i32 %argc, 16 372 %tobool3 = icmp eq i32 %and2, 0 373 %or.cond = or i1 %tobool, %tobool3 374 %storemerge = select i1 %or.cond, i32 0, i32 1 375 ret i32 %storemerge 376} 377 378; test parameter permutations 379; (B & A) == B & (D & A) == D 380define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3) { 381; CHECK-LABEL: @main7a( 382; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 383; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 384; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 385; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 386; CHECK-NEXT: ret i32 [[STOREMERGE]] 387; 388 %and1 = and i32 %argc2, %argc 389 %tobool = icmp eq i32 %and1, %argc2 390 %and2 = and i32 %argc3, %argc 391 %tobool3 = icmp eq i32 %and2, %argc3 392 %and.cond = and i1 %tobool, %tobool3 393 %storemerge = select i1 %and.cond, i32 0, i32 1 394 ret i32 %storemerge 395} 396 397; B == (A & B) & D == (A & D) 398define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3) { 399; CHECK-LABEL: @main7b( 400; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 401; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 402; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 403; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 404; CHECK-NEXT: ret i32 [[STOREMERGE]] 405; 406 %and1 = and i32 %argc, %argc2 407 %tobool = icmp eq i32 %argc2, %and1 408 %and2 = and i32 %argc, %argc3 409 %tobool3 = icmp eq i32 %argc3, %and2 410 %and.cond = and i1 %tobool, %tobool3 411 %storemerge = select i1 %and.cond, i32 0, i32 1 412 ret i32 %storemerge 413} 414 415; B == (B & A) & D == (D & A) 416define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3) { 417; CHECK-LABEL: @main7c( 418; CHECK-NEXT: [[TMP1:%.*]] = or i32 %argc2, %argc3 419; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 420; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 421; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 422; CHECK-NEXT: ret i32 [[STOREMERGE]] 423; 424 %and1 = and i32 %argc2, %argc 425 %tobool = icmp eq i32 %argc2, %and1 426 %and2 = and i32 %argc3, %argc 427 %tobool3 = icmp eq i32 %argc3, %and2 428 %and.cond = and i1 %tobool, %tobool3 429 %storemerge = select i1 %and.cond, i32 0, i32 1 430 ret i32 %storemerge 431} 432 433; (A & (B & C)) == (B & C) & (A & (D & E)) == (D & E) 434define i32 @main7d(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) { 435; CHECK-LABEL: @main7d( 436; CHECK-NEXT: [[BC:%.*]] = and i32 %argc2, %argc4 437; CHECK-NEXT: [[DE:%.*]] = and i32 %argc3, %argc5 438; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]] 439; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 440; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 441; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 442; CHECK-NEXT: ret i32 [[STOREMERGE]] 443; 444 %bc = and i32 %argc2, %argc4 445 %de = and i32 %argc3, %argc5 446 %and1 = and i32 %argc, %bc 447 %tobool = icmp eq i32 %and1, %bc 448 %and2 = and i32 %argc, %de 449 %tobool3 = icmp eq i32 %and2, %de 450 %and.cond = and i1 %tobool, %tobool3 451 %storemerge = select i1 %and.cond, i32 0, i32 1 452 ret i32 %storemerge 453} 454 455; ((B & C) & A) == (B & C) & ((D & E) & A) == (D & E) 456define i32 @main7e(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) { 457; CHECK-LABEL: @main7e( 458; CHECK-NEXT: [[BC:%.*]] = and i32 %argc2, %argc4 459; CHECK-NEXT: [[DE:%.*]] = and i32 %argc3, %argc5 460; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]] 461; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 462; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 463; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 464; CHECK-NEXT: ret i32 [[STOREMERGE]] 465; 466 %bc = and i32 %argc2, %argc4 467 %de = and i32 %argc3, %argc5 468 %and1 = and i32 %bc, %argc 469 %tobool = icmp eq i32 %and1, %bc 470 %and2 = and i32 %de, %argc 471 %tobool3 = icmp eq i32 %and2, %de 472 %and.cond = and i1 %tobool, %tobool3 473 %storemerge = select i1 %and.cond, i32 0, i32 1 474 ret i32 %storemerge 475} 476 477; (B & C) == (A & (B & C)) & (D & E) == (A & (D & E)) 478define i32 @main7f(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) { 479; CHECK-LABEL: @main7f( 480; CHECK-NEXT: [[BC:%.*]] = and i32 %argc2, %argc4 481; CHECK-NEXT: [[DE:%.*]] = and i32 %argc3, %argc5 482; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]] 483; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 484; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 485; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 486; CHECK-NEXT: ret i32 [[STOREMERGE]] 487; 488 %bc = and i32 %argc2, %argc4 489 %de = and i32 %argc3, %argc5 490 %and1 = and i32 %argc, %bc 491 %tobool = icmp eq i32 %bc, %and1 492 %and2 = and i32 %argc, %de 493 %tobool3 = icmp eq i32 %de, %and2 494 %and.cond = and i1 %tobool, %tobool3 495 %storemerge = select i1 %and.cond, i32 0, i32 1 496 ret i32 %storemerge 497} 498 499; (B & C) == ((B & C) & A) & (D & E) == ((D & E) & A) 500define i32 @main7g(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) { 501; CHECK-LABEL: @main7g( 502; CHECK-NEXT: [[BC:%.*]] = and i32 %argc2, %argc4 503; CHECK-NEXT: [[DE:%.*]] = and i32 %argc3, %argc5 504; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]] 505; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], %argc 506; CHECK-NEXT: [[NOT_:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]] 507; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_]] to i32 508; CHECK-NEXT: ret i32 [[STOREMERGE]] 509; 510 %bc = and i32 %argc2, %argc4 511 %de = and i32 %argc3, %argc5 512 %and1 = and i32 %bc, %argc 513 %tobool = icmp eq i32 %bc, %and1 514 %and2 = and i32 %de, %argc 515 %tobool3 = icmp eq i32 %de, %and2 516 %and.cond = and i1 %tobool, %tobool3 517 %storemerge = select i1 %and.cond, i32 0, i32 1 518 ret i32 %storemerge 519} 520 521define i32 @main8(i32 %argc) { 522; CHECK-LABEL: @main8( 523; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192 524; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 525; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 1, i32 2 526; CHECK-NEXT: ret i32 [[RETVAL_0]] 527; 528 %and = and i32 %argc, 64 529 %tobool = icmp ne i32 %and, 0 530 %trunc2 = trunc i32 %argc to i8 531 %tobool3 = icmp slt i8 %trunc2, 0 532 %or.cond = or i1 %tobool, %tobool3 533 %retval.0 = select i1 %or.cond, i32 2, i32 1 534 ret i32 %retval.0 535} 536 537define i32 @main9(i32 %argc) { 538; CHECK-LABEL: @main9( 539; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192 540; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 192 541; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1 542; CHECK-NEXT: ret i32 [[RETVAL_0]] 543; 544 %and = and i32 %argc, 64 545 %tobool = icmp ne i32 %and, 0 546 %trunc2 = trunc i32 %argc to i8 547 %tobool3 = icmp slt i8 %trunc2, 0 548 %or.cond = and i1 %tobool, %tobool3 549 %retval.0 = select i1 %or.cond, i32 2, i32 1 550 ret i32 %retval.0 551} 552 553define i32 @main10(i32 %argc) { 554; CHECK-LABEL: @main10( 555; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192 556; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 557; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1 558; CHECK-NEXT: ret i32 [[RETVAL_0]] 559; 560 %and = and i32 %argc, 64 561 %tobool = icmp eq i32 %and, 0 562 %trunc2 = trunc i32 %argc to i8 563 %tobool3 = icmp sge i8 %trunc2, 0 564 %or.cond = and i1 %tobool, %tobool3 565 %retval.0 = select i1 %or.cond, i32 2, i32 1 566 ret i32 %retval.0 567} 568 569define i32 @main11(i32 %argc) { 570; CHECK-LABEL: @main11( 571; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192 572; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 192 573; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 1, i32 2 574; CHECK-NEXT: ret i32 [[RETVAL_0]] 575; 576 %and = and i32 %argc, 64 577 %tobool = icmp eq i32 %and, 0 578 %trunc2 = trunc i32 %argc to i8 579 %tobool3 = icmp sge i8 %trunc2, 0 580 %or.cond = or i1 %tobool, %tobool3 581 %retval.0 = select i1 %or.cond, i32 2, i32 1 582 ret i32 %retval.0 583} 584 585define i32 @main12(i32 %argc) { 586; CHECK-LABEL: @main12( 587; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896 588; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 589; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 1, i32 2 590; CHECK-NEXT: ret i32 [[RETVAL_0]] 591; 592 %trunc = trunc i32 %argc to i16 593 %tobool = icmp slt i16 %trunc, 0 594 %trunc2 = trunc i32 %argc to i8 595 %tobool3 = icmp slt i8 %trunc2, 0 596 %or.cond = or i1 %tobool, %tobool3 597 %retval.0 = select i1 %or.cond, i32 2, i32 1 598 ret i32 %retval.0 599} 600 601define i32 @main13(i32 %argc) { 602; CHECK-LABEL: @main13( 603; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896 604; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 32896 605; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1 606; CHECK-NEXT: ret i32 [[RETVAL_0]] 607; 608 %trunc = trunc i32 %argc to i16 609 %tobool = icmp slt i16 %trunc, 0 610 %trunc2 = trunc i32 %argc to i8 611 %tobool3 = icmp slt i8 %trunc2, 0 612 %or.cond = and i1 %tobool, %tobool3 613 %retval.0 = select i1 %or.cond, i32 2, i32 1 614 ret i32 %retval.0 615} 616 617define i32 @main14(i32 %argc) { 618; CHECK-LABEL: @main14( 619; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896 620; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 621; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1 622; CHECK-NEXT: ret i32 [[RETVAL_0]] 623; 624 %trunc = trunc i32 %argc to i16 625 %tobool = icmp sge i16 %trunc, 0 626 %trunc2 = trunc i32 %argc to i8 627 %tobool3 = icmp sge i8 %trunc2, 0 628 %or.cond = and i1 %tobool, %tobool3 629 %retval.0 = select i1 %or.cond, i32 2, i32 1 630 ret i32 %retval.0 631} 632 633define i32 @main15(i32 %argc) { 634; CHECK-LABEL: @main15( 635; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896 636; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 32896 637; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 1, i32 2 638; CHECK-NEXT: ret i32 [[RETVAL_0]] 639; 640 %trunc = trunc i32 %argc to i16 641 %tobool = icmp sge i16 %trunc, 0 642 %trunc2 = trunc i32 %argc to i8 643 %tobool3 = icmp sge i8 %trunc2, 0 644 %or.cond = or i1 %tobool, %tobool3 645 %retval.0 = select i1 %or.cond, i32 2, i32 1 646 ret i32 %retval.0 647} 648