1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4target datalayout = "n8:16:32:64" 5 6define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { 7; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2( 8; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 9; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 10; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 11; CHECK-NEXT: ret i32 [[TMP2]] 12; 13 %and = and i32 %x, 1 14 %cmp = icmp eq i32 %and, 0 15 %or = or i32 %y, 2 16 %select = select i1 %cmp, i32 %y, i32 %or 17 ret i32 %select 18} 19 20define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec(<2 x i32> %x, <2 x i32> %y) { 21; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec( 22; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], <i32 1, i32 1> 23; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 2, i32 2> 24; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 25; CHECK-NEXT: ret <2 x i32> [[TMP2]] 26; 27 %and = and <2 x i32> %x, <i32 1, i32 1> 28 %cmp = icmp eq <2 x i32> %and, zeroinitializer 29 %or = or <2 x i32> %y, <i32 2, i32 2> 30 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 31 ret <2 x i32> %select 32} 33 34define i32 @select_icmp_eq_and_1_0_xor_2(i32 %x, i32 %y) { 35; CHECK-LABEL: @select_icmp_eq_and_1_0_xor_2( 36; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 37; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 38; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 39; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 40; CHECK-NEXT: ret i32 [[SELECT]] 41; 42 %and = and i32 %x, 1 43 %cmp = icmp eq i32 %and, 0 44 %xor = xor i32 %y, 2 45 %select = select i1 %cmp, i32 %y, i32 %xor 46 ret i32 %select 47} 48 49define i32 @select_icmp_eq_and_1_0_and_not_2(i32 %x, i32 %y) { 50; CHECK-LABEL: @select_icmp_eq_and_1_0_and_not_2( 51; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 52; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 53; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 54; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 55; CHECK-NEXT: ret i32 [[SELECT]] 56; 57 %and = and i32 %x, 1 58 %cmp = icmp eq i32 %and, 0 59 %and2 = and i32 %y, -3 60 %select = select i1 %cmp, i32 %y, i32 %and2 61 ret i32 %select 62} 63 64define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { 65; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8( 66; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 2 67; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 8 68; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 69; CHECK-NEXT: ret i32 [[TMP2]] 70; 71 %and = and i32 %x, 32 72 %cmp = icmp eq i32 %and, 0 73 %or = or i32 %y, 8 74 %select = select i1 %cmp, i32 %y, i32 %or 75 ret i32 %select 76} 77 78define <2 x i32> @select_icmp_eq_and_32_0_or_8_vec(<2 x i32> %x, <2 x i32> %y) { 79; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8_vec( 80; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 2, i32 2> 81; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 8, i32 8> 82; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 83; CHECK-NEXT: ret <2 x i32> [[TMP2]] 84; 85 %and = and <2 x i32> %x, <i32 32, i32 32> 86 %cmp = icmp eq <2 x i32> %and, zeroinitializer 87 %or = or <2 x i32> %y, <i32 8, i32 8> 88 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 89 ret <2 x i32> %select 90} 91 92define i32 @select_icmp_eq_and_32_0_xor_8(i32 %x, i32 %y) { 93; CHECK-LABEL: @select_icmp_eq_and_32_0_xor_8( 94; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 95; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 96; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 8 97; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 98; CHECK-NEXT: ret i32 [[SELECT]] 99; 100 %and = and i32 %x, 32 101 %cmp = icmp eq i32 %and, 0 102 %xor = xor i32 %y, 8 103 %select = select i1 %cmp, i32 %y, i32 %xor 104 ret i32 %select 105} 106 107define i32 @select_icmp_eq_and_32_0_and_not_8(i32 %x, i32 %y) { 108; CHECK-LABEL: @select_icmp_eq_and_32_0_and_not_8( 109; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 110; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 111; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -9 112; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 113; CHECK-NEXT: ret i32 [[SELECT]] 114; 115 %and = and i32 %x, 32 116 %cmp = icmp eq i32 %and, 0 117 %and2 = and i32 %y, -9 118 %select = select i1 %cmp, i32 %y, i32 %and2 119 ret i32 %select 120} 121 122define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { 123; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096( 124; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 125; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 126; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 127; CHECK-NEXT: ret i32 [[TMP2]] 128; 129 %and = and i32 %x, 4096 130 %cmp = icmp ne i32 0, %and 131 %or = or i32 %y, 4096 132 %select = select i1 %cmp, i32 %y, i32 %or 133 ret i32 %select 134} 135 136define <2 x i32> @select_icmp_ne_0_and_4096_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 137; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096_vec( 138; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 4096, i32 4096> 139; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], <i32 4096, i32 4096> 140; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i32> [[TMP1]], [[Y:%.*]] 141; CHECK-NEXT: ret <2 x i32> [[TMP2]] 142; 143 %and = and <2 x i32> %x, <i32 4096, i32 4096> 144 %cmp = icmp ne <2 x i32> zeroinitializer, %and 145 %or = or <2 x i32> %y, <i32 4096, i32 4096> 146 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 147 ret <2 x i32> %select 148} 149 150define i32 @select_icmp_ne_0_and_4096_xor_4096(i32 %x, i32 %y) { 151; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_4096( 152; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 153; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 154; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 155; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 156; CHECK-NEXT: ret i32 [[SELECT]] 157; 158 %and = and i32 %x, 4096 159 %cmp = icmp ne i32 0, %and 160 %xor = xor i32 %y, 4096 161 %select = select i1 %cmp, i32 %y, i32 %xor 162 ret i32 %select 163} 164 165define i32 @select_icmp_ne_0_and_4096_and_not_4096(i32 %x, i32 %y) { 166; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_4096( 167; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 168; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 169; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 170; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 171; CHECK-NEXT: ret i32 [[SELECT]] 172; 173 %and = and i32 %x, 4096 174 %cmp = icmp ne i32 0, %and 175 %and2 = and i32 %y, -4097 176 %select = select i1 %cmp, i32 %y, i32 %and2 177 ret i32 %select 178} 179 180define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { 181; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096( 182; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 183; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y:%.*]] 184; CHECK-NEXT: ret i32 [[TMP1]] 185; 186 %and = and i32 %x, 4096 187 %cmp = icmp eq i32 %and, 0 188 %or = or i32 %y, 4096 189 %select = select i1 %cmp, i32 %y, i32 %or 190 ret i32 %select 191} 192 193define <2 x i32> @select_icmp_eq_and_4096_0_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 194; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096_vec( 195; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 4096, i32 4096> 196; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[AND]], [[Y:%.*]] 197; CHECK-NEXT: ret <2 x i32> [[TMP1]] 198; 199 %and = and <2 x i32> %x, <i32 4096, i32 4096> 200 %cmp = icmp eq <2 x i32> %and, zeroinitializer 201 %or = or <2 x i32> %y, <i32 4096, i32 4096> 202 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 203 ret <2 x i32> %select 204} 205 206define i32 @select_icmp_eq_and_4096_0_xor_4096(i32 %x, i32 %y) { 207; CHECK-LABEL: @select_icmp_eq_and_4096_0_xor_4096( 208; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 209; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 210; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 211; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 212; CHECK-NEXT: ret i32 [[SELECT]] 213; 214 %and = and i32 %x, 4096 215 %cmp = icmp eq i32 %and, 0 216 %xor = xor i32 %y, 4096 217 %select = select i1 %cmp, i32 %y, i32 %xor 218 ret i32 %select 219} 220 221define i32 @select_icmp_eq_and_4096_0_and_not_4096(i32 %x, i32 %y) { 222; CHECK-LABEL: @select_icmp_eq_and_4096_0_and_not_4096( 223; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 224; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 225; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 226; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 227; CHECK-NEXT: ret i32 [[SELECT]] 228; 229 %and = and i32 %x, 4096 230 %cmp = icmp eq i32 %and, 0 231 %and2 = and i32 %y, -4097 232 %select = select i1 %cmp, i32 %y, i32 %and2 233 ret i32 %select 234} 235 236define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { 237; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1( 238; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 239; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 240; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 241; CHECK-NEXT: ret i32 [[TMP3]] 242; 243 %and = and i64 %x, 1 244 %cmp = icmp eq i64 %and, 0 245 %or = or i32 %y, 1 246 %select = select i1 %cmp, i32 %y, i32 %or 247 ret i32 %select 248} 249 250define <2 x i32> @select_icmp_eq_0_and_1_or_1_vec(<2 x i64> %x, <2 x i32> %y) { 251; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1_vec( 252; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X:%.*]] to <2 x i32> 253; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1> 254; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 255; CHECK-NEXT: ret <2 x i32> [[TMP3]] 256; 257 %and = and <2 x i64> %x, <i64 1, i64 1> 258 %cmp = icmp eq <2 x i64> %and, zeroinitializer 259 %or = or <2 x i32> %y, <i32 1, i32 1> 260 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 261 ret <2 x i32> %select 262} 263 264define i32 @select_icmp_eq_0_and_1_xor_1(i64 %x, i32 %y) { 265; CHECK-LABEL: @select_icmp_eq_0_and_1_xor_1( 266; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 267; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 268; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP2]], [[Y:%.*]] 269; CHECK-NEXT: ret i32 [[SELECT]] 270; 271 %and = and i64 %x, 1 272 %cmp = icmp eq i64 %and, 0 273 %xor = xor i32 %y, 1 274 %select = select i1 %cmp, i32 %y, i32 %xor 275 ret i32 %select 276} 277 278define i32 @select_icmp_eq_0_and_1_and_not_1(i64 %x, i32 %y) { 279; CHECK-LABEL: @select_icmp_eq_0_and_1_and_not_1( 280; CHECK-NEXT: [[AND:%.*]] = and i64 [[X:%.*]], 1 281; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[AND]], 0 282; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2 283; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 284; CHECK-NEXT: ret i32 [[SELECT]] 285; 286 %and = and i64 %x, 1 287 %cmp = icmp eq i64 %and, 0 288 %and2 = and i32 %y, -2 289 %select = select i1 %cmp, i32 %y, i32 %and2 290 ret i32 %select 291} 292 293define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { 294; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_32( 295; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 7 296; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 32 297; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 32 298; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 299; CHECK-NEXT: ret i32 [[TMP3]] 300; 301 %and = and i32 %x, 4096 302 %cmp = icmp ne i32 0, %and 303 %or = or i32 %y, 32 304 %select = select i1 %cmp, i32 %y, i32 %or 305 ret i32 %select 306} 307 308define i32 @select_icmp_ne_0_and_4096_xor_32(i32 %x, i32 %y) { 309; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_32( 310; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 311; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 312; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 32 313; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 314; CHECK-NEXT: ret i32 [[SELECT]] 315; 316 %and = and i32 %x, 4096 317 %cmp = icmp ne i32 0, %and 318 %xor = xor i32 %y, 32 319 %select = select i1 %cmp, i32 %y, i32 %xor 320 ret i32 %select 321} 322 323define i32 @select_icmp_ne_0_and_4096_and_not_32(i32 %x, i32 %y) { 324; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_32( 325; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 326; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 327; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -33 328; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 329; CHECK-NEXT: ret i32 [[SELECT]] 330; 331 %and = and i32 %x, 4096 332 %cmp = icmp ne i32 0, %and 333 %and2 = and i32 %y, -33 334 %select = select i1 %cmp, i32 %y, i32 %and2 335 ret i32 %select 336} 337 338define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { 339; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096( 340; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 7 341; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 4096 342; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 4096 343; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 344; CHECK-NEXT: ret i32 [[TMP3]] 345; 346 %and = and i32 %x, 32 347 %cmp = icmp ne i32 0, %and 348 %or = or i32 %y, 4096 349 %select = select i1 %cmp, i32 %y, i32 %or 350 ret i32 %select 351} 352 353define <2 x i32> @select_icmp_ne_0_and_32_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 354; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096_vec( 355; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], <i32 7, i32 7> 356; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], <i32 4096, i32 4096> 357; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], <i32 4096, i32 4096> 358; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 359; CHECK-NEXT: ret <2 x i32> [[TMP3]] 360; 361 %and = and <2 x i32> %x, <i32 32, i32 32> 362 %cmp = icmp ne <2 x i32> zeroinitializer, %and 363 %or = or <2 x i32> %y, <i32 4096, i32 4096> 364 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 365 ret <2 x i32> %select 366} 367 368define i32 @select_icmp_ne_0_and_32_xor_4096(i32 %x, i32 %y) { 369; CHECK-LABEL: @select_icmp_ne_0_and_32_xor_4096( 370; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 371; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 372; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 373; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 374; CHECK-NEXT: ret i32 [[SELECT]] 375; 376 %and = and i32 %x, 32 377 %cmp = icmp ne i32 0, %and 378 %xor = xor i32 %y, 4096 379 %select = select i1 %cmp, i32 %y, i32 %xor 380 ret i32 %select 381} 382 383define i32 @select_icmp_ne_0_and_32_and_not_4096(i32 %x, i32 %y) { 384; CHECK-LABEL: @select_icmp_ne_0_and_32_and_not_4096( 385; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 386; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 387; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 388; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 389; CHECK-NEXT: ret i32 [[SELECT]] 390; 391 %and = and i32 %x, 32 392 %cmp = icmp ne i32 0, %and 393 %and2 = and i32 %y, -4097 394 %select = select i1 %cmp, i32 %y, i32 %and2 395 ret i32 %select 396} 397 398define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { 399; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_or_8( 400; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 401; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 402; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 8 403; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[OR]], i8 [[Y]] 404; CHECK-NEXT: ret i8 [[SELECT]] 405; 406 %and = and i32 %x, 1073741824 407 %cmp = icmp ne i32 0, %and 408 %or = or i8 %y, 8 409 %select = select i1 %cmp, i8 %y, i8 %or 410 ret i8 %select 411} 412 413define i8 @select_icmp_ne_0_and_1073741824_xor_8(i32 %x, i8 %y) { 414; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_xor_8( 415; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 416; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 417; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[Y:%.*]], 8 418; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[XOR]], i8 [[Y]] 419; CHECK-NEXT: ret i8 [[SELECT]] 420; 421 %and = and i32 %x, 1073741824 422 %cmp = icmp ne i32 0, %and 423 %xor = xor i8 %y, 8 424 %select = select i1 %cmp, i8 %y, i8 %xor 425 ret i8 %select 426} 427 428define i8 @select_icmp_ne_0_and_1073741824_and_not_8(i32 %x, i8 %y) { 429; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_and_not_8( 430; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 431; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 432; CHECK-NEXT: [[AND2:%.*]] = and i8 [[Y:%.*]], -9 433; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[AND2]], i8 [[Y]] 434; CHECK-NEXT: ret i8 [[SELECT]] 435; 436 %and = and i32 %x, 1073741824 437 %cmp = icmp ne i32 0, %and 438 %and2 = and i8 %y, -9 439 %select = select i1 %cmp, i8 %y, i8 %and2 440 ret i8 %select 441} 442 443define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { 444; CHECK-LABEL: @select_icmp_ne_0_and_8_or_1073741824( 445; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 446; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], 0 447; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 1073741824 448; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[Y]] 449; CHECK-NEXT: ret i32 [[SELECT]] 450; 451 %and = and i8 %x, 8 452 %cmp = icmp ne i8 0, %and 453 %or = or i32 %y, 1073741824 454 %select = select i1 %cmp, i32 %y, i32 %or 455 ret i32 %select 456} 457 458define i32 @select_icmp_ne_0_and_8_xor_1073741824(i8 %x, i32 %y) { 459; CHECK-LABEL: @select_icmp_ne_0_and_8_xor_1073741824( 460; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 461; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], 0 462; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 1073741824 463; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 464; CHECK-NEXT: ret i32 [[SELECT]] 465; 466 %and = and i8 %x, 8 467 %cmp = icmp ne i8 0, %and 468 %xor = xor i32 %y, 1073741824 469 %select = select i1 %cmp, i32 %y, i32 %xor 470 ret i32 %select 471} 472 473define i32 @select_icmp_ne_0_and_8_and_not_1073741824(i8 %x, i32 %y) { 474; CHECK-LABEL: @select_icmp_ne_0_and_8_and_not_1073741824( 475; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 476; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], 0 477; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -1073741825 478; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 479; CHECK-NEXT: ret i32 [[SELECT]] 480; 481 %and = and i8 %x, 8 482 %cmp = icmp ne i8 0, %and 483 %and2 = and i32 %y, -1073741825 484 %select = select i1 %cmp, i32 %y, i32 %and2 485 ret i32 %select 486} 487 488; We can't combine here, because the cmp is scalar and the or vector. 489; Just make sure we don't assert. 490define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { 491; CHECK-LABEL: @select_icmp_eq_and_1_0_or_vector_of_2s( 492; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 493; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 494; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[Y:%.*]], <i32 2, i32 2> 495; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], <2 x i32> [[Y]], <2 x i32> [[OR]] 496; CHECK-NEXT: ret <2 x i32> [[SELECT]] 497; 498 %and = and i32 %x, 1 499 %cmp = icmp eq i32 %and, 0 500 %or = or <2 x i32> %y, <i32 2, i32 2> 501 %select = select i1 %cmp, <2 x i32> %y, <2 x i32> %or 502 ret <2 x i32> %select 503} 504 505define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { 506; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( 507; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -9 508; CHECK-NEXT: ret i32 [[TMP1]] 509; 510 %and = and i32 %x, 8 511 %cmp = icmp eq i32 %and, 0 512 %xor = xor i32 %x, 8 513 %x.xor = select i1 %cmp, i32 %x, i32 %xor 514 ret i32 %x.xor 515} 516 517define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { 518; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( 519; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 8 520; CHECK-NEXT: ret i32 [[TMP1]] 521; 522 %and = and i32 %x, 8 523 %cmp = icmp eq i32 %and, 0 524 %xor = xor i32 %x, 8 525 %xor.x = select i1 %cmp, i32 %xor, i32 %x 526 ret i32 %xor.x 527} 528 529define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { 530; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( 531; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 532; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 533; CHECK-NEXT: [[XOR:%.*]] = xor i64 [[Y:%.*]], 8 534; CHECK-NEXT: [[Y_XOR:%.*]] = select i1 [[CMP]], i64 [[Y]], i64 [[XOR]] 535; CHECK-NEXT: ret i64 [[Y_XOR]] 536; 537 %and = and i32 %x, 8 538 %cmp = icmp eq i32 %and, 0 539 %xor = xor i64 %y, 8 540 %y.xor = select i1 %cmp, i64 %y, i64 %xor 541 ret i64 %y.xor 542} 543 544define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { 545; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( 546; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 547; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 548; CHECK-NEXT: [[XOR:%.*]] = xor i64 [[Y:%.*]], 8 549; CHECK-NEXT: [[XOR_Y:%.*]] = select i1 [[CMP]], i64 [[XOR]], i64 [[Y]] 550; CHECK-NEXT: ret i64 [[XOR_Y]] 551; 552 %and = and i32 %x, 8 553 %cmp = icmp eq i32 %and, 0 554 %xor = xor i64 %y, 8 555 %xor.y = select i1 %cmp, i64 %xor, i64 %y 556 ret i64 %xor.y 557} 558 559define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { 560; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( 561; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 562; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 8 563; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 564; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP2]], [[Y:%.*]] 565; CHECK-NEXT: ret i64 [[TMP3]] 566; 567 %and = and i32 %x, 8 568 %cmp = icmp eq i32 %and, 0 569 %or = or i64 %y, 8 570 %or.y = select i1 %cmp, i64 %or, i64 %y 571 ret i64 %or.y 572} 573 574define <2 x i64> @select_icmp_x_and_8_ne_0_y_or_8_vec(<2 x i32> %x, <2 x i64> %y) { 575; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8_vec( 576; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 8, i32 8> 577; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], <i32 8, i32 8> 578; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> 579; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i64> [[TMP2]], [[Y:%.*]] 580; CHECK-NEXT: ret <2 x i64> [[TMP3]] 581; 582 %and = and <2 x i32> %x, <i32 8, i32 8> 583 %cmp = icmp eq <2 x i32> %and, zeroinitializer 584 %or = or <2 x i64> %y, <i64 8, i64 8> 585 %or.y = select <2 x i1> %cmp, <2 x i64> %or, <2 x i64> %y 586 ret <2 x i64> %or.y 587} 588 589define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) { 590; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8( 591; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 592; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 593; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], -9 594; CHECK-NEXT: [[AND_Y:%.*]] = select i1 [[CMP]], i64 [[AND2]], i64 [[Y]] 595; CHECK-NEXT: ret i64 [[AND_Y]] 596; 597 %and = and i32 %x, 8 598 %cmp = icmp eq i32 %and, 0 599 %and2 = and i64 %y, -9 600 %and.y = select i1 %cmp, i64 %and2, i64 %y 601 ret i64 %and.y 602} 603 604define i32 @select_icmp_and_2147483648_ne_0_xor_2147483648(i32 %x) { 605; CHECK-LABEL: @select_icmp_and_2147483648_ne_0_xor_2147483648( 606; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 2147483647 607; CHECK-NEXT: ret i32 [[TMP1]] 608; 609 %and = and i32 %x, 2147483648 610 %cmp = icmp eq i32 %and, 0 611 %xor = xor i32 %x, 2147483648 612 %x.xor = select i1 %cmp, i32 %x, i32 %xor 613 ret i32 %x.xor 614} 615 616define i32 @select_icmp_and_2147483648_eq_0_xor_2147483648(i32 %x) { 617; CHECK-LABEL: @select_icmp_and_2147483648_eq_0_xor_2147483648( 618; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], -2147483648 619; CHECK-NEXT: ret i32 [[TMP1]] 620; 621 %and = and i32 %x, 2147483648 622 %cmp = icmp eq i32 %and, 0 623 %xor = xor i32 %x, 2147483648 624 %xor.x = select i1 %cmp, i32 %xor, i32 %x 625 ret i32 %xor.x 626} 627 628define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) { 629; CHECK-LABEL: @select_icmp_x_and_2147483648_ne_0_or_2147483648( 630; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 631; CHECK-NEXT: ret i32 [[OR]] 632; 633 %and = and i32 %x, 2147483648 634 %cmp = icmp eq i32 %and, 0 635 %or = or i32 %x, 2147483648 636 %or.x = select i1 %cmp, i32 %or, i32 %x 637 ret i32 %or.x 638} 639 640define i32 @test68(i32 %x, i32 %y) { 641; CHECK-LABEL: @test68( 642; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 643; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 644; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]] 645; CHECK-NEXT: ret i32 [[TMP3]] 646; 647 %and = and i32 %x, 128 648 %cmp = icmp eq i32 %and, 0 649 %or = or i32 %y, 2 650 %select = select i1 %cmp, i32 %y, i32 %or 651 ret i32 %select 652} 653 654define <2 x i32> @test68vec(<2 x i32> %x, <2 x i32> %y) { 655; CHECK-LABEL: @test68vec( 656; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6> 657; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2> 658; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], [[Y:%.*]] 659; CHECK-NEXT: ret <2 x i32> [[TMP3]] 660; 661 %and = and <2 x i32> %x, <i32 128, i32 128> 662 %cmp = icmp eq <2 x i32> %and, zeroinitializer 663 %or = or <2 x i32> %y, <i32 2, i32 2> 664 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 665 ret <2 x i32> %select 666} 667 668define i32 @test68_xor(i32 %x, i32 %y) { 669; CHECK-LABEL: @test68_xor( 670; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 671; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1 672; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 673; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 674; CHECK-NEXT: ret i32 [[SELECT]] 675; 676 %and = and i32 %x, 128 677 %cmp = icmp eq i32 %and, 0 678 %xor = xor i32 %y, 2 679 %select = select i1 %cmp, i32 %y, i32 %xor 680 ret i32 %select 681} 682 683define i32 @test68_and(i32 %x, i32 %y) { 684; CHECK-LABEL: @test68_and( 685; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 686; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1 687; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 688; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 689; CHECK-NEXT: ret i32 [[SELECT]] 690; 691 %and = and i32 %x, 128 692 %cmp = icmp eq i32 %and, 0 693 %and2 = and i32 %y, -3 694 %select = select i1 %cmp, i32 %y, i32 %and2 695 ret i32 %select 696} 697 698define i32 @test69(i32 %x, i32 %y) { 699; CHECK-LABEL: @test69( 700; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 701; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 702; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP2]], 2 703; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[Y:%.*]] 704; CHECK-NEXT: ret i32 [[TMP4]] 705; 706 %and = and i32 %x, 128 707 %cmp = icmp ne i32 %and, 0 708 %or = or i32 %y, 2 709 %select = select i1 %cmp, i32 %y, i32 %or 710 ret i32 %select 711} 712 713define <2 x i32> @test69vec(<2 x i32> %x, <2 x i32> %y) { 714; CHECK-LABEL: @test69vec( 715; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6> 716; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2> 717; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP2]], <i32 2, i32 2> 718; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP3]], [[Y:%.*]] 719; CHECK-NEXT: ret <2 x i32> [[TMP4]] 720; 721 %and = and <2 x i32> %x, <i32 128, i32 128> 722 %cmp = icmp ne <2 x i32> %and, zeroinitializer 723 %or = or <2 x i32> %y, <i32 2, i32 2> 724 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 725 ret <2 x i32> %select 726} 727 728define i32 @test69_xor(i32 %x, i32 %y) { 729; CHECK-LABEL: @test69_xor( 730; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 731; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 0 732; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 733; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 734; CHECK-NEXT: ret i32 [[SELECT]] 735; 736 %and = and i32 %x, 128 737 %cmp = icmp ne i32 %and, 0 738 %xor = xor i32 %y, 2 739 %select = select i1 %cmp, i32 %y, i32 %xor 740 ret i32 %select 741} 742 743define i32 @test69_and(i32 %x, i32 %y) { 744; CHECK-LABEL: @test69_and( 745; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 746; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 0 747; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2 748; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 749; CHECK-NEXT: ret i32 [[SELECT]] 750; 751 %and = and i32 %x, 128 752 %cmp = icmp ne i32 %and, 0 753 %and2 = and i32 %y, 2 754 %select = select i1 %cmp, i32 %y, i32 %and2 755 ret i32 %select 756} 757 758define i8 @test70(i8 %x, i8 %y) { 759; CHECK-LABEL: @test70( 760; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 761; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 2 762; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[OR]], i8 [[Y]] 763; CHECK-NEXT: ret i8 [[SELECT]] 764; 765 %cmp = icmp slt i8 %x, 0 766 %or = or i8 %y, 2 767 %select = select i1 %cmp, i8 %or, i8 %y 768 ret i8 %select 769} 770 771define i32 @shift_no_xor_multiuse_or(i32 %x, i32 %y) { 772; CHECK-LABEL: @shift_no_xor_multiuse_or( 773; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 774; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 775; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 776; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y]] 777; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[OR]] 778; CHECK-NEXT: ret i32 [[RES]] 779; 780 %and = and i32 %x, 1 781 %cmp = icmp eq i32 %and, 0 782 %or = or i32 %y, 2 783 %select = select i1 %cmp, i32 %y, i32 %or 784 %res = mul i32 %select, %or ; to bump up use count of the Or 785 ret i32 %res 786} 787 788define i32 @shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 789; CHECK-LABEL: @shift_no_xor_multiuse_xor( 790; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 791; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 792; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 793; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 794; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 795; CHECK-NEXT: ret i32 [[RES]] 796; 797 %and = and i32 %x, 1 798 %cmp = icmp eq i32 %and, 0 799 %xor = xor i32 %y, 2 800 %select = select i1 %cmp, i32 %y, i32 %xor 801 %res = mul i32 %select, %xor ; to bump up use count of the Xor 802 ret i32 %res 803} 804 805define i32 @shift_no_xor_multiuse_and(i32 %x, i32 %y) { 806; CHECK-LABEL: @shift_no_xor_multiuse_and( 807; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 808; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 809; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 810; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 811; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 812; CHECK-NEXT: ret i32 [[RES]] 813; 814 %and = and i32 %x, 1 815 %cmp = icmp eq i32 %and, 0 816 %and2 = and i32 %y, -3 817 %select = select i1 %cmp, i32 %y, i32 %and2 818 %res = mul i32 %select, %and2 ; to bump up use count of the And 819 ret i32 %res 820} 821 822define i32 @no_shift_no_xor_multiuse_or(i32 %x, i32 %y) { 823; CHECK-LABEL: @no_shift_no_xor_multiuse_or( 824; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 825; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 826; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y]] 827; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[OR]] 828; CHECK-NEXT: ret i32 [[RES]] 829; 830 %and = and i32 %x, 4096 831 %cmp = icmp eq i32 %and, 0 832 %or = or i32 %y, 4096 833 %select = select i1 %cmp, i32 %y, i32 %or 834 %res = mul i32 %select, %or ; to bump up use count of the Or 835 ret i32 %res 836} 837 838define i32 @no_shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 839; CHECK-LABEL: @no_shift_no_xor_multiuse_xor( 840; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 841; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 842; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 843; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 844; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 845; CHECK-NEXT: ret i32 [[RES]] 846; 847 %and = and i32 %x, 4096 848 %cmp = icmp eq i32 %and, 0 849 %xor = xor i32 %y, 4096 850 %select = select i1 %cmp, i32 %y, i32 %xor 851 %res = mul i32 %select, %xor ; to bump up use count of the Xor 852 ret i32 %res 853} 854 855define i32 @no_shift_no_xor_multiuse_and(i32 %x, i32 %y) { 856; CHECK-LABEL: @no_shift_no_xor_multiuse_and( 857; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 858; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 859; CHECK-NEXT: [[AND2:%.*]] = add i32 [[Y:%.*]], -4097 860; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 861; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 862; CHECK-NEXT: ret i32 [[RES]] 863; 864 %and = and i32 %x, 4096 865 %cmp = icmp eq i32 %and, 0 866 %and2 = add i32 %y, -4097 867 %select = select i1 %cmp, i32 %y, i32 %and2 868 %res = mul i32 %select, %and2 ; to bump up use count of the And 869 ret i32 %res 870} 871 872define i32 @no_shift_xor_multiuse_or(i32 %x, i32 %y) { 873; CHECK-LABEL: @no_shift_xor_multiuse_or( 874; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 875; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 876; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 877; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y]] 878; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[OR]] 879; CHECK-NEXT: ret i32 [[RES]] 880; 881 %and = and i32 %x, 4096 882 %cmp = icmp ne i32 0, %and 883 %or = or i32 %y, 4096 884 %select = select i1 %cmp, i32 %y, i32 %or 885 %res = mul i32 %select, %or ; to bump up use count of the Or 886 ret i32 %res 887} 888 889define i32 @no_shift_xor_multiuse_xor(i32 %x, i32 %y) { 890; CHECK-LABEL: @no_shift_xor_multiuse_xor( 891; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 892; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 893; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 894; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 895; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 896; CHECK-NEXT: ret i32 [[RES]] 897; 898 %and = and i32 %x, 4096 899 %cmp = icmp ne i32 0, %and 900 %xor = xor i32 %y, 4096 901 %select = select i1 %cmp, i32 %y, i32 %xor 902 %res = mul i32 %select, %xor ; to bump up use count of the Xor 903 ret i32 %res 904} 905 906define i32 @no_shift_xor_multiuse_and(i32 %x, i32 %y) { 907; CHECK-LABEL: @no_shift_xor_multiuse_and( 908; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 909; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 910; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 911; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 912; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 913; CHECK-NEXT: ret i32 [[RES]] 914; 915 %and = and i32 %x, 4096 916 %cmp = icmp ne i32 0, %and 917 %and2 = and i32 %y, -4097 918 %select = select i1 %cmp, i32 %y, i32 %and2 919 %res = mul i32 %select, %and2 ; to bump up use count of the And 920 ret i32 %res 921} 922 923define i32 @shift_xor_multiuse_or(i32 %x, i32 %y) { 924; CHECK-LABEL: @shift_xor_multiuse_or( 925; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 926; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 927; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 928; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[Y]] 929; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 930; CHECK-NEXT: ret i32 [[RES]] 931; 932 %and = and i32 %x, 4096 933 %cmp = icmp ne i32 0, %and 934 %or = or i32 %y, 2048 935 %select = select i1 %cmp, i32 %y, i32 %or 936 %res = mul i32 %select, %or ; to bump up use count of the Or 937 ret i32 %res 938} 939 940define i32 @shift_xor_multiuse_xor(i32 %x, i32 %y) { 941; CHECK-LABEL: @shift_xor_multiuse_xor( 942; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 943; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 944; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 945; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[Y]] 946; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 947; CHECK-NEXT: ret i32 [[RES]] 948; 949 %and = and i32 %x, 4096 950 %cmp = icmp ne i32 0, %and 951 %xor = xor i32 %y, 2048 952 %select = select i1 %cmp, i32 %y, i32 %xor 953 %res = mul i32 %select, %xor ; to bump up use count of the Xor 954 ret i32 %res 955} 956 957define i32 @shift_xor_multiuse_and(i32 %x, i32 %y) { 958; CHECK-LABEL: @shift_xor_multiuse_and( 959; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 960; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 961; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 962; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[AND2]], i32 [[Y]] 963; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 964; CHECK-NEXT: ret i32 [[RES]] 965; 966 %and = and i32 %x, 4096 967 %cmp = icmp ne i32 0, %and 968 %and2 = and i32 %y, -2049 969 %select = select i1 %cmp, i32 %y, i32 %and2 970 %res = mul i32 %select, %and2 ; to bump up use count of the and 971 ret i32 %res 972} 973 974define i32 @shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 975; CHECK-LABEL: @shift_no_xor_multiuse_cmp( 976; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 977; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 978; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i32 [[AND]], 1 979; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 980; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 981; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[SELECT2]] 982; CHECK-NEXT: ret i32 [[RES]] 983; 984 %and = and i32 %x, 1 985 %cmp = icmp eq i32 %and, 0 986 %or = or i32 %y, 2 987 %select = select i1 %cmp, i32 %y, i32 %or 988 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 989 %res = mul i32 %select, %select2 990 ret i32 %res 991} 992 993define i32 @shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 994; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_xor( 995; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 996; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 997; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 998; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 999; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1000; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1001; CHECK-NEXT: ret i32 [[RES]] 1002; 1003 %and = and i32 %x, 1 1004 %cmp = icmp eq i32 %and, 0 1005 %xor = xor i32 %y, 2 1006 %select = select i1 %cmp, i32 %y, i32 %xor 1007 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1008 %res = mul i32 %select, %select2 1009 ret i32 %res 1010} 1011 1012define i32 @shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1013; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_and( 1014; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1015; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1016; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1017; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1018; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1019; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1020; CHECK-NEXT: ret i32 [[RES]] 1021; 1022 %and = and i32 %x, 1 1023 %cmp = icmp eq i32 %and, 0 1024 %and2 = and i32 %y, -3 1025 %select = select i1 %cmp, i32 %y, i32 %and2 1026 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1027 %res = mul i32 %select, %select2 1028 ret i32 %res 1029} 1030 1031define i32 @no_shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1032; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp( 1033; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1034; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1035; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y:%.*]] 1036; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1037; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[SELECT2]] 1038; CHECK-NEXT: ret i32 [[RES]] 1039; 1040 %and = and i32 %x, 4096 1041 %cmp = icmp eq i32 %and, 0 1042 %or = or i32 %y, 4096 1043 %select = select i1 %cmp, i32 %y, i32 %or 1044 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1045 %res = mul i32 %select, %select2 1046 ret i32 %res 1047} 1048 1049define i32 @no_shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1050; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_xor( 1051; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1052; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1053; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1054; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1055; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1056; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1057; CHECK-NEXT: ret i32 [[RES]] 1058; 1059 %and = and i32 %x, 4096 1060 %cmp = icmp eq i32 %and, 0 1061 %xor = xor i32 %y, 4096 1062 %select = select i1 %cmp, i32 %y, i32 %xor 1063 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1064 %res = mul i32 %select, %select2 1065 ret i32 %res 1066} 1067 1068define i32 @no_shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1069; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_and( 1070; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1071; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1072; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1073; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1074; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1075; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1076; CHECK-NEXT: ret i32 [[RES]] 1077; 1078 %and = and i32 %x, 4096 1079 %cmp = icmp eq i32 %and, 0 1080 %and2 = and i32 %y, -4097 1081 %select = select i1 %cmp, i32 %y, i32 %and2 1082 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1083 %res = mul i32 %select, %select2 1084 ret i32 %res 1085} 1086 1087define i32 @no_shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1088; CHECK-LABEL: @no_shift_xor_multiuse_cmp( 1089; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1090; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1091; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 1092; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[Y:%.*]] 1093; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[W:%.*]], i32 [[Z:%.*]] 1094; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP2]], [[SELECT2]] 1095; CHECK-NEXT: ret i32 [[RES]] 1096; 1097 %and = and i32 %x, 4096 1098 %cmp = icmp ne i32 0, %and 1099 %or = or i32 %y, 4096 1100 %select = select i1 %cmp, i32 %y, i32 %or 1101 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1102 %res = mul i32 %select, %select2 1103 ret i32 %res 1104} 1105 1106define i32 @no_shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1107; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_xor( 1108; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1109; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1110; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1111; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1112; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1113; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1114; CHECK-NEXT: ret i32 [[RES]] 1115; 1116 %and = and i32 %x, 4096 1117 %cmp = icmp ne i32 0, %and 1118 %xor = xor i32 %y, 4096 1119 %select = select i1 %cmp, i32 %y, i32 %xor 1120 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1121 %res = mul i32 %select, %select2 1122 ret i32 %res 1123} 1124 1125define i32 @no_shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1126; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_and( 1127; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1128; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1129; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1130; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1131; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1132; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1133; CHECK-NEXT: ret i32 [[RES]] 1134; 1135 %and = and i32 %x, 4096 1136 %cmp = icmp ne i32 0, %and 1137 %and2 = and i32 %y, -4097 1138 %select = select i1 %cmp, i32 %y, i32 %and2 1139 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1140 %res = mul i32 %select, %select2 1141 ret i32 %res 1142} 1143 1144define i32 @shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1145; CHECK-LABEL: @shift_xor_multiuse_cmp( 1146; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1147; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1148; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1149; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1150; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1151; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1152; CHECK-NEXT: ret i32 [[RES]] 1153; 1154 %and = and i32 %x, 4096 1155 %cmp = icmp ne i32 0, %and 1156 %or = or i32 %y, 2048 1157 %select = select i1 %cmp, i32 %y, i32 %or 1158 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1159 %res = mul i32 %select, %select2 1160 ret i32 %res 1161} 1162 1163define i32 @shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1164; CHECK-LABEL: @shift_xor_multiuse_cmp_with_xor( 1165; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1166; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1167; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1168; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1169; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1170; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1171; CHECK-NEXT: ret i32 [[RES]] 1172; 1173 %and = and i32 %x, 4096 1174 %cmp = icmp ne i32 0, %and 1175 %xor = xor i32 %y, 2048 1176 %select = select i1 %cmp, i32 %y, i32 %xor 1177 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1178 %res = mul i32 %select, %select2 1179 ret i32 %res 1180} 1181 1182define i32 @shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1183; CHECK-LABEL: @shift_xor_multiuse_cmp_with_and( 1184; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1185; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1186; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 1187; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1188; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1189; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1190; CHECK-NEXT: ret i32 [[RES]] 1191; 1192 %and = and i32 %x, 4096 1193 %cmp = icmp ne i32 0, %and 1194 %and2 = and i32 %y, -2049 1195 %select = select i1 %cmp, i32 %y, i32 %and2 1196 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1197 %res = mul i32 %select, %select2 1198 ret i32 %res 1199} 1200 1201define i32 @shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1202; CHECK-LABEL: @shift_no_xor_multiuse_cmp_or( 1203; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1204; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1205; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 1206; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1207; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1208; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1209; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1210; CHECK-NEXT: ret i32 [[RES2]] 1211; 1212 %and = and i32 %x, 1 1213 %cmp = icmp eq i32 %and, 0 1214 %or = or i32 %y, 2 1215 %select = select i1 %cmp, i32 %y, i32 %or 1216 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1217 %res = mul i32 %select, %select2 1218 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1219 ret i32 %res2 1220} 1221 1222define i32 @shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1223; CHECK-LABEL: @shift_no_xor_multiuse_cmp_xor( 1224; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1225; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1226; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 1227; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1228; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1229; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1230; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1231; CHECK-NEXT: ret i32 [[RES2]] 1232; 1233 %and = and i32 %x, 1 1234 %cmp = icmp eq i32 %and, 0 1235 %xor = xor i32 %y, 2 1236 %select = select i1 %cmp, i32 %y, i32 %xor 1237 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1238 %res = mul i32 %select, %select2 1239 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1240 ret i32 %res2 1241} 1242 1243define i32 @shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1244; CHECK-LABEL: @shift_no_xor_multiuse_cmp_and( 1245; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1246; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1247; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1248; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1249; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1250; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1251; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1252; CHECK-NEXT: ret i32 [[RES2]] 1253; 1254 %and = and i32 %x, 1 1255 %cmp = icmp eq i32 %and, 0 1256 %and2 = and i32 %y, -3 1257 %select = select i1 %cmp, i32 %y, i32 %and2 1258 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1259 %res = mul i32 %select, %select2 1260 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1261 ret i32 %res2 1262} 1263 1264define i32 @no_shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1265; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_or( 1266; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1267; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1268; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1269; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], [[Y]] 1270; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1271; CHECK-NEXT: [[RES:%.*]] = mul i32 [[TMP1]], [[SELECT2]] 1272; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1273; CHECK-NEXT: ret i32 [[RES2]] 1274; 1275 %and = and i32 %x, 4096 1276 %cmp = icmp eq i32 %and, 0 1277 %or = or i32 %y, 4096 1278 %select = select i1 %cmp, i32 %y, i32 %or 1279 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1280 %res = mul i32 %select, %select2 1281 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1282 ret i32 %res2 1283} 1284 1285define i32 @no_shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1286; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_xor( 1287; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1288; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1289; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1290; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1291; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1292; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1293; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1294; CHECK-NEXT: ret i32 [[RES2]] 1295; 1296 %and = and i32 %x, 4096 1297 %cmp = icmp eq i32 %and, 0 1298 %xor = xor i32 %y, 4096 1299 %select = select i1 %cmp, i32 %y, i32 %xor 1300 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1301 %res = mul i32 %select, %select2 1302 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1303 ret i32 %res2 1304} 1305 1306define i32 @no_shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1307; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_and( 1308; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1309; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1310; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1311; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1312; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1313; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1314; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1315; CHECK-NEXT: ret i32 [[RES2]] 1316; 1317 %and = and i32 %x, 4096 1318 %cmp = icmp eq i32 %and, 0 1319 %and2 = and i32 %y, -4097 1320 %select = select i1 %cmp, i32 %y, i32 %and2 1321 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1322 %res = mul i32 %select, %select2 1323 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1324 ret i32 %res2 1325} 1326 1327define i32 @no_shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1328; CHECK-LABEL: @no_shift_xor_multiuse_cmp_or( 1329; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1330; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1331; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1332; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1333; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1334; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1335; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1336; CHECK-NEXT: ret i32 [[RES2]] 1337; 1338 %and = and i32 %x, 4096 1339 %cmp = icmp ne i32 0, %and 1340 %or = or i32 %y, 4096 1341 %select = select i1 %cmp, i32 %y, i32 %or 1342 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1343 %res = mul i32 %select, %select2 1344 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1345 ret i32 %res2 1346} 1347 1348define i32 @no_shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1349; CHECK-LABEL: @no_shift_xor_multiuse_cmp_xor( 1350; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1351; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1352; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1353; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1354; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1355; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1356; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1357; CHECK-NEXT: ret i32 [[RES2]] 1358; 1359 %and = and i32 %x, 4096 1360 %cmp = icmp ne i32 0, %and 1361 %xor = xor i32 %y, 4096 1362 %select = select i1 %cmp, i32 %y, i32 %xor 1363 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1364 %res = mul i32 %select, %select2 1365 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1366 ret i32 %res2 1367} 1368 1369define i32 @no_shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1370; CHECK-LABEL: @no_shift_xor_multiuse_cmp_and( 1371; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1372; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1373; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1374; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1375; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1376; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1377; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1378; CHECK-NEXT: ret i32 [[RES2]] 1379; 1380 %and = and i32 %x, 4096 1381 %cmp = icmp ne i32 0, %and 1382 %and2 = and i32 %y, -4097 1383 %select = select i1 %cmp, i32 %y, i32 %and2 1384 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1385 %res = mul i32 %select, %select2 1386 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1387 ret i32 %res2 1388} 1389 1390define i32 @shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1391; CHECK-LABEL: @shift_xor_multiuse_cmp_or( 1392; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1393; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1394; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1395; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1396; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1397; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1398; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1399; CHECK-NEXT: ret i32 [[RES2]] 1400; 1401 %and = and i32 %x, 4096 1402 %cmp = icmp ne i32 0, %and 1403 %or = or i32 %y, 2048 1404 %select = select i1 %cmp, i32 %y, i32 %or 1405 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1406 %res = mul i32 %select, %select2 1407 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1408 ret i32 %res2 1409} 1410 1411define i32 @shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1412; CHECK-LABEL: @shift_xor_multiuse_cmp_xor( 1413; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1414; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1415; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1416; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1417; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1418; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1419; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1420; CHECK-NEXT: ret i32 [[RES2]] 1421; 1422 %and = and i32 %x, 4096 1423 %cmp = icmp ne i32 0, %and 1424 %xor = xor i32 %y, 2048 1425 %select = select i1 %cmp, i32 %y, i32 %xor 1426 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1427 %res = mul i32 %select, %select2 1428 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1429 ret i32 %res2 1430} 1431 1432define i32 @shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1433; CHECK-LABEL: @shift_xor_multiuse_cmp_and( 1434; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1435; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 1436; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2048 1437; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1438; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1439; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1440; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1441; CHECK-NEXT: ret i32 [[RES2]] 1442; 1443 %and = and i32 %x, 4096 1444 %cmp = icmp ne i32 0, %and 1445 %and2 = and i32 %y, 2048 1446 %select = select i1 %cmp, i32 %y, i32 %and2 1447 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1448 %res = mul i32 %select, %select2 1449 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1450 ret i32 %res2 1451} 1452