1; Simple test of signed and unsigned integer conversions. 2 3; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4; RUN: --target x8632 -i %s --args -O2 \ 5; RUN: | %if --need=target_X8632 --command FileCheck %s 6 7; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 8; RUN: --target x8632 -i %s --args -Om1 \ 9; RUN: | %if --need=target_X8632 --command FileCheck %s 10 11; RUN: %if --need=target_ARM32 \ 12; RUN: --command %p2i --filetype=obj \ 13; RUN: --disassemble --target arm32 -i %s --args -O2 \ 14; RUN: | %if --need=target_ARM32 \ 15; RUN: --command FileCheck --check-prefix ARM32 %s 16 17; RUN: %if --need=target_ARM32 \ 18; RUN: --command %p2i --filetype=obj \ 19; RUN: --disassemble --target arm32 -i %s --args -Om1 \ 20; RUN: | %if --need=target_ARM32 \ 21; RUN: --command FileCheck --check-prefix ARM32 %s 22 23; RUN: %if --need=target_MIPS32 --need=allow_dump \ 24; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \ 25; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \ 26; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 27; RUN: --command FileCheck --check-prefix MIPS32 %s 28 29@i8v = internal global [1 x i8] zeroinitializer, align 1 30@i16v = internal global [2 x i8] zeroinitializer, align 2 31@i32v = internal global [4 x i8] zeroinitializer, align 4 32@i64v = internal global [8 x i8] zeroinitializer, align 8 33@u8v = internal global [1 x i8] zeroinitializer, align 1 34@u16v = internal global [2 x i8] zeroinitializer, align 2 35@u32v = internal global [4 x i8] zeroinitializer, align 4 36@u64v = internal global [8 x i8] zeroinitializer, align 8 37 38define internal void @from_int8() { 39entry: 40 %__0 = bitcast [1 x i8]* @i8v to i8* 41 %v0 = load i8, i8* %__0, align 1 42 %v1 = sext i8 %v0 to i16 43 %__3 = bitcast [2 x i8]* @i16v to i16* 44 store i16 %v1, i16* %__3, align 1 45 %v2 = sext i8 %v0 to i32 46 %__5 = bitcast [4 x i8]* @i32v to i32* 47 store i32 %v2, i32* %__5, align 1 48 %v3 = sext i8 %v0 to i64 49 %__7 = bitcast [8 x i8]* @i64v to i64* 50 store i64 %v3, i64* %__7, align 1 51 ret void 52} 53; CHECK-LABEL: from_int8 54; CHECK: mov {{.*}},{{(BYTE PTR)?}} 55; CHECK: movsx {{.*}},{{[a-d]l|BYTE PTR}} 56; CHECK: mov {{(WORD PTR)?}} 57; CHECK: movsx 58; CHECK: mov {{(DWORD PTR)?}} 59; CHECK: movsx 60; CHECK: sar {{.*}},0x1f 61; CHECK-DAG: ds:0x{{.}},{{.*}}{{i64v|.bss}} 62; CHECK-DAG: ds:0x{{.}},{{.*}}{{i64v|.bss}} 63 64; ARM32-LABEL: from_int8 65; ARM32: movw {{.*}}i8v 66; ARM32: ldrb 67; ARM32: sxtb 68; ARM32: movw {{.*}}i16v 69; ARM32: strh 70; ARM32: sxtb 71; ARM32: movw {{.*}}i32v 72; ARM32: str r 73; ARM32: sxtb 74; ARM32: asr 75; ARM32: movw {{.*}}i64v 76; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}] 77; ARM32-DAG: str r{{.*}}, [{{.*}}, #4] 78 79; MIPS32-LABEL: from_int8 80; MIPS32: lui {{.*}} i8v 81; MIPS32: addiu {{.*}} i8v 82; MIPS32: lb 83; MIPS32: move 84; MIPS32: sll {{.*}},0x18 85; MIPS32: sra {{.*}},0x18 86; MIPS32: lui {{.*}} i16v 87; MIPS32: addiu {{.*}} i16v 88; MIPS32: sh 89; MIPS32: move 90; MIPS32: sll {{.*}},0x18 91; MIPS32: sra {{.*}},0x18 92; MIPS32: lui {{.*}} i32v 93; MIPS32: addiu {{.*}} i32v 94; MIPS32: sw 95; MIPS32: sll {{.*}},0x18 96; MIPS32: sra {{.*}},0x18 97; MIPS32: sra {{.*}},0x1f 98; MIPS32: lui {{.*}} i64v 99; MIPS32: addiu {{.*}} i64v 100 101define internal void @from_int16() { 102entry: 103 %__0 = bitcast [2 x i8]* @i16v to i16* 104 %v0 = load i16, i16* %__0, align 1 105 %v1 = trunc i16 %v0 to i8 106 %__3 = bitcast [1 x i8]* @i8v to i8* 107 store i8 %v1, i8* %__3, align 1 108 %v2 = sext i16 %v0 to i32 109 %__5 = bitcast [4 x i8]* @i32v to i32* 110 store i32 %v2, i32* %__5, align 1 111 %v3 = sext i16 %v0 to i64 112 %__7 = bitcast [8 x i8]* @i64v to i64* 113 store i64 %v3, i64* %__7, align 1 114 ret void 115} 116; CHECK-LABEL: from_int16 117; CHECK: mov {{.*}},{{(WORD PTR)?}} 118; CHECK: 0x{{.}} {{.*}}{{i16v|.bss}} 119; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} 120; CHECK: 0x{{.}},{{.*}}{{i32v|.bss}} 121; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} 122; CHECK: sar {{.*}},0x1f 123; CHECK: 0x{{.}},{{.*}}{{i64v|.bss}} 124 125; ARM32-LABEL: from_int16 126; ARM32: movw {{.*}}i16v 127; ARM32: ldrh 128; ARM32: movw {{.*}}i8v 129; ARM32: strb 130; ARM32: sxth 131; ARM32: movw {{.*}}i32v 132; ARM32: str r 133; ARM32: sxth 134; ARM32: asr 135; ARM32: movw {{.*}}i64v 136; ARM32: str r 137 138; MIPS32-LABEL: from_int16 139; MIPS32: lui {{.*}} i16v 140; MIPS32: addiu {{.*}} i16v 141; MIPS32: lh 142; MIPS32: move 143; MIPS32: lui {{.*}} i8v 144; MIPS32: addiu {{.*}} i8v 145; MIPS32: sb 146; MIPS32: move 147; MIPS32: sll {{.*}},0x10 148; MIPS32: sra {{.*}},0x10 149; MIPS32: lui {{.*}} i32v 150; MIPS32: addiu {{.*}} i32v 151; MIPS32: sw 152; MIPS32: sll {{.*}},0x10 153; MIPS32: sra {{.*}},0x10 154; MIPS32: sra {{.*}},0x1f 155; MIPS32: lui {{.*}} i64v 156; MIPS32: addiu {{.*}} i64v 157 158define internal void @from_int32() { 159entry: 160 %__0 = bitcast [4 x i8]* @i32v to i32* 161 %v0 = load i32, i32* %__0, align 1 162 %v1 = trunc i32 %v0 to i8 163 %__3 = bitcast [1 x i8]* @i8v to i8* 164 store i8 %v1, i8* %__3, align 1 165 %v2 = trunc i32 %v0 to i16 166 %__5 = bitcast [2 x i8]* @i16v to i16* 167 store i16 %v2, i16* %__5, align 1 168 %v3 = sext i32 %v0 to i64 169 %__7 = bitcast [8 x i8]* @i64v to i64* 170 store i64 %v3, i64* %__7, align 1 171 ret void 172} 173; CHECK-LABEL: from_int32 174; CHECK: 0x{{.}} {{.*}} {{i32v|.bss}} 175; CHECK: 0x{{.}},{{.*}} {{i8v|.bss}} 176; CHECK: 0x{{.}},{{.*}} {{i16v|.bss}} 177; CHECK: sar {{.*}},0x1f 178; CHECK: 0x{{.}},{{.*}} {{i64v|.bss}} 179 180; ARM32-LABEL: from_int32 181; ARM32: movw {{.*}}i32v 182; ARM32: ldr r 183; ARM32: movw {{.*}}i8v 184; ARM32: strb 185; ARM32: movw {{.*}}i16v 186; ARM32: strh 187; ARM32: asr 188; ARM32: movw {{.*}}i64v 189; ARM32: str r 190 191; MIPS32-LABEL: from_int32 192; MIPS32: lui {{.*}} i32v 193; MIPS32: addiu {{.*}} i32v 194; MIPS32: lw 195; MIPS32: move 196; MIPS32: lui {{.*}} i8v 197; MIPS32: addiu {{.*}} i8v 198; MIPS32: sb 199; MIPS32: move 200; MIPS32: lui {{.*}} i16v 201; MIPS32: addiu {{.*}} i16v 202; MIPS32: sh 203; MIPS32: sra {{.*}},0x1f 204; MIPS32: lui {{.*}} i64v 205; MIPS32: addiu {{.*}} i64v 206 207define internal void @from_int64() { 208entry: 209 %__0 = bitcast [8 x i8]* @i64v to i64* 210 %v0 = load i64, i64* %__0, align 1 211 %v1 = trunc i64 %v0 to i8 212 %__3 = bitcast [1 x i8]* @i8v to i8* 213 store i8 %v1, i8* %__3, align 1 214 %v2 = trunc i64 %v0 to i16 215 %__5 = bitcast [2 x i8]* @i16v to i16* 216 store i16 %v2, i16* %__5, align 1 217 %v3 = trunc i64 %v0 to i32 218 %__7 = bitcast [4 x i8]* @i32v to i32* 219 store i32 %v3, i32* %__7, align 1 220 ret void 221} 222; CHECK-LABEL: from_int64 223; CHECK: 0x{{.}} {{.*}} {{i64v|.bss}} 224; CHECK: 0x{{.}},{{.*}} {{i8v|.bss}} 225; CHECK: 0x{{.}},{{.*}} {{i16v|.bss}} 226; CHECK: 0x{{.}},{{.*}} {{i32v|.bss}} 227 228; ARM32-LABEL: from_int64 229; ARM32: movw {{.*}}i64v 230; ARM32: ldr r 231; ARM32: movw {{.*}}i8v 232; ARM32: strb 233; ARM32: movw {{.*}}i16v 234; ARM32: strh 235; ARM32: movw {{.*}}i32v 236; ARM32: str r 237 238; MIPS32-LABEL: from_int64 239; MIPS32: lui {{.*}} i64v 240; MIPS32: addiu {{.*}} i64v 241; MIPS32: lw 242; MIPS32: move 243; MIPS32: lui {{.*}} i8v 244; MIPS32: addiu {{.*}} i8v 245; MIPS32: sb 246; MIPS32: move 247; MIPS32: lui {{.*}} i16v 248; MIPS32: addiu {{.*}} i16v 249; MIPS32: sh 250; MIPS32: lui {{.*}} i32v 251; MIPS32: addiu {{.*}} i32v 252 253define internal void @from_uint8() { 254entry: 255 %__0 = bitcast [1 x i8]* @u8v to i8* 256 %v0 = load i8, i8* %__0, align 1 257 %v1 = zext i8 %v0 to i16 258 %__3 = bitcast [2 x i8]* @i16v to i16* 259 store i16 %v1, i16* %__3, align 1 260 %v2 = zext i8 %v0 to i32 261 %__5 = bitcast [4 x i8]* @i32v to i32* 262 store i32 %v2, i32* %__5, align 1 263 %v3 = zext i8 %v0 to i64 264 %__7 = bitcast [8 x i8]* @i64v to i64* 265 store i64 %v3, i64* %__7, align 1 266 ret void 267} 268; CHECK-LABEL: from_uint8 269; CHECK: 0x{{.*}} {{.*}} {{u8v|.bss}} 270; CHECK: movzx {{.*}},{{[a-d]l|BYTE PTR}} 271; CHECK: 0x{{.}},{{.*}} {{i16v|.bss}} 272; CHECK: movzx 273; CHECK: 0x{{.}},{{.*}} {{i32v|.bss}} 274; CHECK: movzx 275; CHECK: mov {{.*}},0x0 276; CHECK: 0x{{.}},{{.*}} {{i64v|.bss}} 277 278; ARM32-LABEL: from_uint8 279; ARM32: movw {{.*}}u8v 280; ARM32: ldrb 281; ARM32: uxtb 282; ARM32: movw {{.*}}i16v 283; ARM32: strh 284; ARM32: uxtb 285; ARM32: movw {{.*}}i32v 286; ARM32: str r 287; ARM32: uxtb 288; ARM32: mov {{.*}}, #0 289; ARM32: movw {{.*}}i64v 290; ARM32: str r 291 292; MIPS32-LABEL: from_uint8 293; MIPS32: lui {{.*}} u8v 294; MIPS32: addiu {{.*}} u8v 295; MIPS32: lb 296; MIPS32: move 297; MIPS32: andi {{.*}},0xff 298; MIPS32: lui {{.*}} i16v 299; MIPS32: addiu {{.*}} i16v 300; MIPS32: sh 301; MIPS32: move 302; MIPS32: andi {{.*}},0xff 303; MIPS32: lui {{.*}} i32v 304; MIPS32: addiu {{.*}} i32v 305; MIPS32: sw 306; MIPS32: andi {{.*}},0xff 307; MIPS32: li {{.*}},0 308; MIPS32: lui {{.*}} i64v 309; MIPS32: addiu {{.*}} i64v 310 311define internal void @from_uint16() { 312entry: 313 %__0 = bitcast [2 x i8]* @u16v to i16* 314 %v0 = load i16, i16* %__0, align 1 315 %v1 = trunc i16 %v0 to i8 316 %__3 = bitcast [1 x i8]* @i8v to i8* 317 store i8 %v1, i8* %__3, align 1 318 %v2 = zext i16 %v0 to i32 319 %__5 = bitcast [4 x i8]* @i32v to i32* 320 store i32 %v2, i32* %__5, align 1 321 %v3 = zext i16 %v0 to i64 322 %__7 = bitcast [8 x i8]* @i64v to i64* 323 store i64 %v3, i64* %__7, align 1 324 ret void 325} 326; CHECK-LABEL: from_uint16 327; CHECK: 0x{{.*}} {{.*}} {{u16v|.bss}} 328; CHECK: 0x{{.}},{{.*}} {{i8v|.bss}} 329; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} 330; CHECK: 0x{{.}},{{.*}} {{i32v|.bss}} 331; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} 332; CHECK: mov {{.*}},0x0 333; CHECK: 0x{{.}},{{.*}} {{i64v|.bss}} 334 335; ARM32-LABEL: from_uint16 336; ARM32: movw {{.*}}u16v 337; ARM32: ldrh 338; ARM32: movw {{.*}}i8v 339; ARM32: strb 340; ARM32: uxth 341; ARM32: movw {{.*}}i32v 342; ARM32: str r 343; ARM32: uxth 344; ARM32: mov {{.*}}, #0 345; ARM32: movw {{.*}}i64v 346; ARM32: str r 347 348; MIPS32-LABEL: from_uint16 349; MIPS32: lui {{.*}} u16v 350; MIPS32: addiu {{.*}} u16v 351; MIPS32: lh 352; MIPS32: move 353; MIPS32: lui {{.*}} i8v 354; MIPS32: addiu {{.*}} i8v 355; MIPS32: sb 356; MIPS32: move 357; MIPS32: andi {{.*}},0xffff 358; MIPS32: lui {{.*}} i32v 359; MIPS32: addiu {{.*}} i32v 360; MIPS32: sw 361; MIPS32: andi {{.*}},0xffff 362; MIPS32: li {{.*}},0 363; MIPS32: lui {{.*}} i64v 364; MIPS32: addiu {{.*}} i64v 365 366define internal void @from_uint32() { 367entry: 368 %__0 = bitcast [4 x i8]* @u32v to i32* 369 %v0 = load i32, i32* %__0, align 1 370 %v1 = trunc i32 %v0 to i8 371 %__3 = bitcast [1 x i8]* @i8v to i8* 372 store i8 %v1, i8* %__3, align 1 373 %v2 = trunc i32 %v0 to i16 374 %__5 = bitcast [2 x i8]* @i16v to i16* 375 store i16 %v2, i16* %__5, align 1 376 %v3 = zext i32 %v0 to i64 377 %__7 = bitcast [8 x i8]* @i64v to i64* 378 store i64 %v3, i64* %__7, align 1 379 ret void 380} 381; CHECK-LABEL: from_uint32 382; CHECK: 0x{{.*}} {{.*}} {{u32v|.bss}} 383; CHECK: 0x{{.}},{{.*}} {{i8v|.bss}} 384; CHECK: 0x{{.}},{{.*}} {{i16v|.bss}} 385; CHECK: mov {{.*}},0x0 386; CHECK: 0x{{.}},{{.*}} {{i64v|.bss}} 387 388; ARM32-LABEL: from_uint32 389; ARM32: movw {{.*}}u32v 390; ARM32: ldr r 391; ARM32: movw {{.*}}i8v 392; ARM32: strb 393; ARM32: movw {{.*}}i16v 394; ARM32: strh 395; ARM32: mov {{.*}}, #0 396; ARM32: movw {{.*}}i64v 397; ARM32: str r 398 399; MIPS32-LABEL: from_uint32 400; MIPS32: lui {{.*}} u32v 401; MIPS32: addiu {{.*}} u32v 402; MIPS32: lw 403; MIPS32: move 404; MIPS32: lui {{.*}} i8v 405; MIPS32: addiu {{.*}} i8v 406; MIPS32: sb 407; MIPS32: move 408; MIPS32: lui {{.*}} i16v 409; MIPS32: addiu {{.*}} i16v 410; MIPS32: sh 411; MIPS32: li {{.*}},0 412; MIPS32: lui {{.*}} i64v 413; MIPS32: addiu {{.*}} i64v 414 415define internal void @from_uint64() { 416entry: 417 %__0 = bitcast [8 x i8]* @u64v to i64* 418 %v0 = load i64, i64* %__0, align 1 419 %v1 = trunc i64 %v0 to i8 420 %__3 = bitcast [1 x i8]* @i8v to i8* 421 store i8 %v1, i8* %__3, align 1 422 %v2 = trunc i64 %v0 to i16 423 %__5 = bitcast [2 x i8]* @i16v to i16* 424 store i16 %v2, i16* %__5, align 1 425 %v3 = trunc i64 %v0 to i32 426 %__7 = bitcast [4 x i8]* @i32v to i32* 427 store i32 %v3, i32* %__7, align 1 428 ret void 429} 430; CHECK-LABEL: from_uint64 431; CHECK: 0x{{.*}} {{.*}} {{u64v|.bss}} 432; CHECK: 0x{{.}},{{.*}} {{i8v|.bss}} 433; CHECK: 0x{{.}},{{.*}} {{i16v|.bss}} 434; CHECK: 0x{{.}},{{.*}} {{i32v|.bss}} 435 436; ARM32-LABEL: from_uint64 437; ARM32: movw {{.*}}u64v 438; ARM32: ldr r 439; ARM32: movw {{.*}}i8v 440; ARM32: strb 441; ARM32: movw {{.*}}i16v 442; ARM32: strh 443; ARM32: movw {{.*}}i32v 444; ARM32: str r 445 446; MIPS32-LABEL: from_uint64 447; MIPS32: lui {{.*}} u64v 448; MIPS32: addiu {{.*}} u64v 449; MIPS32: lw 450; MIPS32: move 451; MIPS32: lui {{.*}} i8v 452; MIPS32: addiu {{.*}} i8v 453; MIPS32: sb 454; MIPS32: move 455; MIPS32: lui {{.*}} i16v 456; MIPS32: addiu {{.*}} i16v 457; MIPS32: sh 458; MIPS32: lui {{.*}} i32v 459; MIPS32: addiu {{.*}} i32v 460