1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2009 4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. 5 */ 6 7 #include <common.h> 8 #include <time.h> 9 #include <asm/io.h> 10 #include <asm/arch/hardware.h> 11 #include <asm/arch/spr_gpt.h> 12 #include <asm/arch/spr_misc.h> 13 14 #define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ) 15 #define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING) 16 17 static struct gpt_regs *const gpt_regs_p = 18 (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE; 19 20 static struct misc_regs *const misc_regs_p = 21 (struct misc_regs *)CONFIG_SPEAR_MISCBASE; 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 static ulong get_timer_masked(void); 26 27 #define timestamp gd->arch.tbl 28 #define lastdec gd->arch.lastinc 29 timer_init(void)30int timer_init(void) 31 { 32 u32 synth; 33 34 /* Prescaler setting */ 35 #if defined(CONFIG_SPEAR3XX) 36 writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg); 37 synth = MISC_GPT4SYNTH; 38 #elif defined(CONFIG_SPEAR600) 39 writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg); 40 synth = MISC_GPT3SYNTH; 41 #else 42 # error Incorrect config. Can only be SPEAR{600|300|310|320} 43 #endif 44 45 writel(readl(&misc_regs_p->periph_clk_cfg) | synth, 46 &misc_regs_p->periph_clk_cfg); 47 48 /* disable timers */ 49 writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control); 50 51 /* load value for free running */ 52 writel(GPT_FREE_RUNNING, &gpt_regs_p->compare); 53 54 /* auto reload, start timer */ 55 writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); 56 57 /* Reset the timer */ 58 lastdec = READ_TIMER(); 59 timestamp = 0; 60 61 return 0; 62 } 63 64 /* 65 * timer without interrupts 66 */ get_timer(ulong base)67ulong get_timer(ulong base) 68 { 69 return (get_timer_masked() / GPT_RESOLUTION) - base; 70 } 71 __udelay(unsigned long usec)72void __udelay(unsigned long usec) 73 { 74 ulong tmo; 75 ulong start = get_timer_masked(); 76 ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100); 77 ulong rndoff; 78 79 rndoff = (usec % 10) ? 1 : 0; 80 81 /* tenudelcnt timer tick gives 10 microsecconds delay */ 82 tmo = ((usec / 10) + rndoff) * tenudelcnt; 83 84 while ((ulong) (get_timer_masked() - start) < tmo) 85 ; 86 } 87 get_timer_masked(void)88static ulong get_timer_masked(void) 89 { 90 ulong now = READ_TIMER(); 91 92 if (now >= lastdec) { 93 /* normal mode */ 94 timestamp += now - lastdec; 95 } else { 96 /* we have an overflow ... */ 97 timestamp += now + GPT_FREE_RUNNING - lastdec; 98 } 99 lastdec = now; 100 101 return timestamp; 102 } 103 104 /* 105 * This function is derived from PowerPC code (read timebase as long long). 106 * On ARM it just returns the timer value. 107 */ get_ticks(void)108unsigned long long get_ticks(void) 109 { 110 return get_timer(0); 111 } 112 113 /* 114 * This function is derived from PowerPC code (timebase clock frequency). 115 * On ARM it returns the number of timer ticks per second. 116 */ get_tbclk(void)117ulong get_tbclk(void) 118 { 119 return CONFIG_SPEAR_HZ; 120 } 121