• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <cpu_func.h>
8 #include <asm/io.h>
9 #include <asm/system.h>
10 #include <asm/armv8/mmu.h>
11 #include <asm/io.h>
12 #include <asm/arch/mc_me_regs.h>
13 #include "cpu.h"
14 
cpu_mask(void)15 u32 cpu_mask(void)
16 {
17 	return readl(MC_ME_CS);
18 }
19 
20 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
21 
22 #define S32V234_IRAM_BASE        0x3e800000UL
23 #define S32V234_IRAM_SIZE        0x800000UL
24 #define S32V234_DRAM_BASE1       0x80000000UL
25 #define S32V234_DRAM_SIZE1       0x40000000UL
26 #define S32V234_DRAM_BASE2       0xC0000000UL
27 #define S32V234_DRAM_SIZE2       0x20000000UL
28 #define S32V234_PERIPH_BASE      0x40000000UL
29 #define S32V234_PERIPH_SIZE      0x40000000UL
30 
31 static struct mm_region s32v234_mem_map[] = {
32 	{
33 		.virt = S32V234_IRAM_BASE,
34 		.phys = S32V234_IRAM_BASE,
35 		.size = S32V234_IRAM_SIZE,
36 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
37 			 PTE_BLOCK_OUTER_SHARE
38 	}, {
39 		.virt = S32V234_DRAM_BASE1,
40 		.phys = S32V234_DRAM_BASE1,
41 		.size = S32V234_DRAM_SIZE1,
42 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
43 			 PTE_BLOCK_OUTER_SHARE
44 	}, {
45 		.virt = S32V234_PERIPH_BASE,
46 		.phys = S32V234_PERIPH_BASE,
47 		.size = S32V234_PERIPH_SIZE,
48 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
49 			 PTE_BLOCK_NON_SHARE
50 			 /* TODO: Do we need these? */
51 			 /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
52 	}, {
53 		.virt = S32V234_DRAM_BASE2,
54 		.phys = S32V234_DRAM_BASE2,
55 		.size = S32V234_DRAM_SIZE2,
56 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
57 			 PTE_BLOCK_OUTER_SHARE
58 	}, {
59 		/* List terminator */
60 		0,
61 	}
62 };
63 
64 struct mm_region *mem_map = s32v234_mem_map;
65 
66 #endif
67 
68 /*
69  * Return the number of cores on this SOC.
70  */
cpu_numcores(void)71 int cpu_numcores(void)
72 {
73 	int numcores;
74 	u32 mask;
75 
76 	mask = cpu_mask();
77 	numcores = hweight32(cpu_mask());
78 
79 	/* Verify if M4 is deactivated */
80 	if (mask & 0x1)
81 		numcores--;
82 
83 	return numcores;
84 }
85 
86 #if defined(CONFIG_ARCH_EARLY_INIT_R)
arch_early_init_r(void)87 int arch_early_init_r(void)
88 {
89 	int rv;
90 	asm volatile ("dsb sy");
91 	rv = fsl_s32v234_wake_seconday_cores();
92 
93 	if (rv)
94 		printf("Did not wake secondary cores\n");
95 
96 	asm volatile ("sev");
97 	return 0;
98 }
99 #endif /* CONFIG_ARCH_EARLY_INIT_R */
100