1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH 5 */ 6/dts-v1/; 7 8#include "am33xx.dtsi" 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/interrupt-controller/irq.h> 11 12/ { 13 model = "Bosch AM335x Guardian"; 14 compatible = "bosch,am335x-guardian", "ti,am33xx"; 15 16 chosen { 17 stdout-path = &uart0; 18 tick-timer = &timer2; 19 }; 20 21 cpus { 22 cpu@0 { 23 cpu0-supply = <&dcdc2_reg>; 24 }; 25 }; 26 27 memory@80000000 { 28 device_type = "memory"; 29 reg = <0x80000000 0x10000000>; /* 256 MB */ 30 }; 31 32 gpio_keys { 33 compatible = "gpio-keys"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&guardian_button_pins>; 36 37 select-button { 38 label = "guardian-select-button"; 39 linux,code = <KEY_5>; 40 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; 41 wakeup-source; 42 }; 43 44 power-button { 45 label = "guardian-power-button"; 46 linux,code = <KEY_POWER>; 47 gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; 48 wakeup-source; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 pinctrl-names = "default"; 55 pinctrl-0 = <&guardian_led_pins>; 56 57 life-led { 58 label = "guardian:life-led"; 59 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "heartbeat"; 61 default-state = "off"; 62 }; 63 }; 64 65 panel { 66 compatible = "ti,tilcdc,panel"; 67 pinctrl-names = "default", "sleep"; 68 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>; 69 pinctrl-1 = <&lcd_pins_sleep>; 70 71 display-timings { 72 320x240 { 73 hactive = <320>; 74 vactive = <240>; 75 hback-porch = <68>; 76 hfront-porch = <20>; 77 hsync-len = <1>; 78 vback-porch = <18>; 79 vfront-porch = <4>; 80 vsync-len = <1>; 81 clock-frequency = <9000000>; 82 hsync-active = <0>; 83 vsync-active = <0>; 84 }; 85 }; 86 panel-info { 87 ac-bias = <255>; 88 ac-bias-intrpt = <0>; 89 dma-burst-sz = <16>; 90 bpp = <24>; 91 bus-width = <16>; 92 fdd = <0x80>; 93 sync-edge = <0>; 94 sync-ctrl = <1>; 95 raster-order = <0>; 96 fifo-th = <0>; 97 }; 98 99 }; 100 101 pwm7: dmtimer-pwm { 102 compatible = "ti,omap-dmtimer-pwm"; 103 ti,timers = <&timer7>; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&dmtimer7_pins>; 106 }; 107 108 vmmcsd_fixed: regulator-3v3 { 109 compatible = "regulator-fixed"; 110 regulator-name = "vmmcsd_fixed"; 111 regulator-min-microvolt = <3300000>; 112 regulator-max-microvolt = <3300000>; 113 }; 114}; 115 116&cppi41dma { 117 status = "okay"; 118}; 119 120&elm { 121 status = "okay"; 122}; 123 124&gpmc { 125 pinctrl-names = "default"; 126 pinctrl-0 = <&nandflash_pins>; 127 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ 128 status = "okay"; 129 130 nand@0,0 { 131 compatible = "ti,omap2-nand"; 132 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 133 interrupt-parent = <&gpmc>; 134 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 135 <1 IRQ_TYPE_NONE>; /* termcount */ 136 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 137 ti,nand-ecc-opt = "bch16"; 138 ti,elm-id = <&elm>; 139 nand-bus-width = <8>; 140 gpmc,device-width = <1>; 141 gpmc,sync-clk-ps = <0>; 142 gpmc,cs-on-ns = <0>; 143 gpmc,cs-rd-off-ns = <30>; 144 gpmc,cs-wr-off-ns = <30>; 145 gpmc,adv-on-ns = <0>; 146 gpmc,adv-rd-off-ns = <30>; 147 gpmc,adv-wr-off-ns = <30>; 148 gpmc,we-on-ns = <0>; 149 gpmc,we-off-ns = <15>; 150 gpmc,oe-on-ns = <1>; 151 gpmc,oe-off-ns = <15>; 152 gpmc,access-ns = <30>; 153 gpmc,rd-cycle-ns = <30>; 154 gpmc,wr-cycle-ns = <30>; 155 gpmc,wait-on-read = "true"; 156 gpmc,wait-on-write = "true"; 157 gpmc,bus-turnaround-ns = <0>; 158 gpmc,cycle2cycle-delay-ns = <0>; 159 gpmc,clk-activation-ns = <0>; 160 gpmc,wait-monitoring-ns = <0>; 161 gpmc,wr-access-ns = <0>; 162 gpmc,wr-data-mux-bus-ns = <0>; 163 164 /* 165 * MTD partition table 166 * 167 * All SPL-* partitions are sized to minimal length which can 168 * be independently programmable. For NAND flash this is equal 169 * to size of erase-block. 170 */ 171 #address-cells = <1>; 172 #size-cells = <1>; 173 174 partition@0 { 175 label = "SPL"; 176 reg = <0x0 0x40000>; 177 }; 178 179 partition@1 { 180 label = "SPL.backup1"; 181 reg = <0x40000 0x40000>; 182 }; 183 184 partition@2 { 185 label = "SPL.backup2"; 186 reg = <0x80000 0x40000>; 187 }; 188 189 partition@3 { 190 label = "SPL.backup3"; 191 reg = <0xc0000 0x40000>; 192 }; 193 194 partition@4 { 195 label = "u-boot"; 196 reg = <0x100000 0x100000>; 197 }; 198 199 partition@5 { 200 label = "u-boot.backup1"; 201 reg = <0x200000 0x100000>; 202 }; 203 204 partition@6 { 205 label = "UBI"; 206 reg = <0x300000 0x1fd00000>; 207 }; 208 }; 209}; 210 211&i2c0 { 212 pinctrl-names = "default"; 213 pinctrl-0 = <&i2c0_pins>; 214 clock-frequency = <400000>; 215 status = "okay"; 216 217 tps: tps@24 { 218 reg = <0x24>; 219 }; 220}; 221 222&lcdc { 223 blue-and-red-wiring = "crossed"; 224 status = "okay"; 225}; 226 227&mmc1 { 228 bus-width = <0x4>; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&mmc1_pins>; 231 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 232 vmmc-supply = <&vmmcsd_fixed>; 233 status = "okay"; 234}; 235 236&rtc { 237 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; 238 clock-names = "ext-clk", "int-clk"; 239 system-power-controller; 240}; 241 242&spi0 { 243 ti,pindir-d0-out-d1-in; 244 pinctrl-names = "default"; 245 pinctrl-0 = <&spi0_pins>; 246 status = "okay"; 247}; 248 249/include/ "tps65217.dtsi" 250 251&tps { 252 ti,pmic-shutdown-controller; 253 interrupt-parent = <&intc>; 254 interrupts = <7>; /* NMI */ 255 256 backlight { 257 isel = <1>; /* 1 - ISET1, 2 ISET2 */ 258 fdim = <100>; /* TPS65217_BL_FDIM_100HZ */ 259 default-brightness = <100>; 260 }; 261 262 regulators { 263 dcdc1_reg: regulator@0 { 264 regulator-name = "vdds_dpr"; 265 regulator-always-on; 266 }; 267 268 dcdc2_reg: regulator@1 { 269 regulator-name = "vdd_mpu"; 270 regulator-min-microvolt = <925000>; 271 regulator-max-microvolt = <1351500>; 272 regulator-boot-on; 273 regulator-always-on; 274 }; 275 276 dcdc3_reg: regulator@2 { 277 regulator-name = "vdd_core"; 278 regulator-min-microvolt = <925000>; 279 regulator-max-microvolt = <1150000>; 280 regulator-boot-on; 281 regulator-always-on; 282 }; 283 284 ldo1_reg: regulator@3 { 285 regulator-name = "vio,vrtc,vdds"; 286 regulator-always-on; 287 }; 288 289 ldo2_reg: regulator@4 { 290 regulator-name = "vdd_3v3aux"; 291 regulator-always-on; 292 }; 293 294 ldo3_reg: regulator@5 { 295 regulator-name = "vdd_1v8"; 296 regulator-min-microvolt = <1800000>; 297 regulator-max-microvolt = <1800000>; 298 regulator-always-on; 299 }; 300 301 ldo4_reg: regulator@6 { 302 regulator-name = "vdd_3v3a"; 303 regulator-always-on; 304 }; 305 }; 306}; 307 308&tscadc { 309 status = "okay"; 310 311 adc { 312 ti,adc-channels = <0 1 2 3 4 5 6>; 313 }; 314}; 315 316&uart0 { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&uart0_pins>; 319 status = "okay"; 320}; 321 322&uart2 { 323 pinctrl-names = "default"; 324 pinctrl-0 = <&uart2_pins>; 325 status = "okay"; 326}; 327 328&usb { 329 status = "okay"; 330}; 331 332&usb_ctrl_mod { 333 status = "okay"; 334}; 335 336&usb0 { 337 dr_mode = "peripheral"; 338 status = "okay"; 339}; 340 341&usb0_phy { 342 status = "okay"; 343}; 344 345&usb1 { 346 dr_mode = "host"; 347 status = "okay"; 348}; 349 350&usb1_phy { 351 status = "okay"; 352}; 353 354&am33xx_pinmux { 355 pinctrl-names = "default"; 356 pinctrl-0 = <&clkout2_pin &guardian_interface_pins>; 357 358 clkout2_pin: pinmux_clkout2_pin { 359 pinctrl-single,pins = < 360 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) 361 >; 362 }; 363 364 dmtimer7_pins: pinmux_dmtimer7_pins { 365 pinctrl-single,pins = < 366 AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) 367 >; 368 }; 369 370 guardian_button_pins: pinmux_gpio_keys_pins { 371 pinctrl-single,pins = < 372 AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) 373 AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) 374 >; 375 }; 376 377 guardian_interface_pins: pinmux_guardian_interface_pins { 378 pinctrl-single,pins = < 379 AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7) 380 AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7) 381 AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 382 AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7) 383 AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7) 384 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7) 385 AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 386 AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 387 AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7) 388 AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 389 >; 390 }; 391 392 i2c0_pins: pinmux_i2c0_pins { 393 pinctrl-single,pins = < 394 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) 395 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) 396 >; 397 }; 398 399 lcd_disen_pins: pinmux_lcd_disen_pins { 400 pinctrl-single,pins = < 401 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7) 402 >; 403 }; 404 405 lcd_pins_default: pinmux_lcd_pins_default { 406 pinctrl-single,pins = < 407 AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 408 AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 409 AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 410 AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 411 AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 412 AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 413 AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 414 AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) 415 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 416 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 417 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 418 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 419 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 420 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 421 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 422 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 423 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 424 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 425 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 426 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 427 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 428 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 429 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 430 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 431 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 432 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 433 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 434 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) 435 >; 436 }; 437 438 lcd_pins_sleep: pinmux_lcd_pins_sleep { 439 pinctrl-single,pins = < 440 AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 441 AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 442 AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 443 AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 444 AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 445 AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 446 AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 447 AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 448 AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 449 AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 450 AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 451 AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 452 AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 453 AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 454 AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 455 AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) 456 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 457 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 458 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 459 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) 460 >; 461 }; 462 463 guardian_led_pins: pinmux_leds_pins { 464 pinctrl-single,pins = < 465 AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) 466 >; 467 }; 468 469 mmc1_pins: pinmux_mmc1_pins { 470 pinctrl-single,pins = < 471 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) 472 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) 473 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) 474 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) 475 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) 476 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) 477 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 478 >; 479 }; 480 481 spi0_pins: pinmux_spi0_pins { 482 pinctrl-single,pins = < 483 AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 484 AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0) 485 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) 486 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) 487 >; 488 }; 489 490 uart0_pins: pinmux_uart0_pins { 491 pinctrl-single,pins = < 492 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) 493 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 494 >; 495 }; 496 497 uart2_pins: pinmux_uart2_pins { 498 pinctrl-single,pins = < 499 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) 500 AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) 501 >; 502 }; 503 504 nandflash_pins: pinmux_nandflash_pins { 505 pinctrl-single,pins = < 506 AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0) 507 AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0) 508 AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0) 509 AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) 510 AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0) 511 AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0) 512 AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0) 513 AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) 514 AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0) 515 AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0) 516 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) 517 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 518 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 519 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) 520 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) 521 >; 522 }; 523}; 524