1// SPDX-License-Identifier: GPL-2.0 2/* 3 * support for the bosch am335x based shc c3 board 4 * 5 * Copyright, (C) 2015 Heiko Schocher <hs@denx.de> 6 * 7 */ 8/dts-v1/; 9 10#include "am33xx.dtsi" 11#include <dt-bindings/input/input.h> 12 13/ { 14 model = "Bosch SHC"; 15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx"; 16 17 aliases { 18 mmcblk0 = &mmc1; 19 mmcblk1 = &mmc2; 20 }; 21 22 cpus { 23 cpu@0 { 24 /* 25 * To consider voltage drop between PMIC and SoC, 26 * tolerance value is reduced to 2% from 4% and 27 * voltage value is increased as a precaution. 28 */ 29 operating-points = < 30 /* kHz uV */ 31 594000 1225000 32 294000 1125000 33 >; 34 voltage-tolerance = <2>; /* 2 percentage */ 35 cpu0-supply = <&dcdc2_reg>; 36 }; 37 }; 38 39 gpio_keys { 40 compatible = "gpio-keys"; 41 42 back_button { 43 label = "Back Button"; 44 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 45 linux,code = <KEY_BACK>; 46 debounce-interval = <1000>; 47 wakeup-source; 48 }; 49 50 front_button { 51 label = "Front Button"; 52 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; 53 linux,code = <KEY_FRONT>; 54 debounce-interval = <1000>; 55 wakeup-source; 56 }; 57 }; 58 59 leds { 60 pinctrl-names = "default"; 61 pinctrl-0 = <&user_leds_s0>; 62 63 compatible = "gpio-leds"; 64 65 led1 { 66 label = "shc:power:red"; 67 gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; 68 default-state = "off"; 69 }; 70 71 led2 { 72 label = "shc:power:bl"; 73 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; 74 linux,default-trigger = "timer"; 75 default-state = "on"; 76 }; 77 78 led3 { 79 label = "shc:lan:red"; 80 gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; 81 default-state = "off"; 82 }; 83 84 led4 { 85 label = "shc:lan:bl"; 86 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 87 default-state = "off"; 88 }; 89 90 led5 { 91 label = "shc:cloud:red"; 92 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 93 default-state = "off"; 94 }; 95 96 led6 { 97 label = "shc:cloud:bl"; 98 gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; 99 default-state = "off"; 100 }; 101 }; 102 103 memory@80000000 { 104 device_type = "memory"; 105 reg = <0x80000000 0x20000000>; /* 512 MB */ 106 }; 107 108 vmmcsd_fixed: fixedregulator0 { 109 compatible = "regulator-fixed"; 110 regulator-name = "vmmcsd_fixed"; 111 regulator-min-microvolt = <3300000>; 112 regulator-max-microvolt = <3300000>; 113 }; 114}; 115 116&aes { 117 status = "okay"; 118}; 119 120&cppi41dma { 121 status = "okay"; 122}; 123 124&davinci_mdio { 125 pinctrl-names = "default", "sleep"; 126 pinctrl-0 = <&davinci_mdio_default>; 127 pinctrl-1 = <&davinci_mdio_sleep>; 128 status = "okay"; 129 130 ethernetphy0: ethernet-phy@0 { 131 reg = <0>; 132 smsc,disable-energy-detect; 133 }; 134}; 135 136&epwmss1 { 137 status = "okay"; 138 139 ehrpwm1: pwm@48302200 { 140 pinctrl-names = "default"; 141 pinctrl-0 = <&ehrpwm1_pins>; 142 status = "okay"; 143 }; 144}; 145 146&gpio1 { 147 hmtc_rst { 148 gpio-hog; 149 gpios = <24 GPIO_ACTIVE_LOW>; 150 output-high; 151 line-name = "homematic_reset"; 152 }; 153 154 hmtc_prog { 155 gpio-hog; 156 gpios = <27 GPIO_ACTIVE_LOW>; 157 output-high; 158 line-name = "homematic_program"; 159 }; 160}; 161 162&gpio3 { 163 zgb_rst { 164 gpio-hog; 165 gpios = <18 GPIO_ACTIVE_LOW>; 166 output-low; 167 line-name = "zigbee_reset"; 168 }; 169 170 zgb_boot { 171 gpio-hog; 172 gpios = <19 GPIO_ACTIVE_HIGH>; 173 output-high; 174 line-name = "zigbee_boot"; 175 }; 176}; 177 178&i2c0 { 179 pinctrl-names = "default"; 180 pinctrl-0 = <&i2c0_pins>; 181 status = "okay"; 182 clock-frequency = <400000>; 183 184 tps: tps@24 { 185 reg = <0x24>; 186 }; 187 188 at24@50 { 189 compatible = "atmel,24c32"; 190 pagesize = <32>; 191 reg = <0x50>; 192 }; 193 194 pcf8563@51 { 195 compatible = "nxp,pcf8563"; 196 reg = <0x51>; 197 }; 198}; 199 200&cpsw_emac0 { 201 phy-mode = "mii"; 202 phy-handle = <ðernetphy0>; 203}; 204 205&mac { 206 pinctrl-names = "default", "sleep"; 207 pinctrl-0 = <&cpsw_default>; 208 pinctrl-1 = <&cpsw_sleep>; 209 status = "okay"; 210 slaves = <1>; 211}; 212 213&mmc1 { 214 pinctrl-names = "default"; 215 pinctrl-0 = <&mmc1_pins>; 216 bus-width = <0x4>; 217 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 218 cd-inverted; 219 max-frequency = <26000000>; 220 vmmc-supply = <&vmmcsd_fixed>; 221 status = "okay"; 222}; 223 224&mmc2 { 225 pinctrl-names = "default"; 226 pinctrl-0 = <&emmc_pins>; 227 bus-width = <8>; 228 max-frequency = <26000000>; 229 sd-uhs-sdr25; 230 vmmc-supply = <&vmmcsd_fixed>; 231 status = "okay"; 232}; 233 234&mmc3 { 235 pinctrl-names = "default"; 236 pinctrl-0 = <&mmc3_pins>; 237 bus-width = <4>; 238 cap-power-off-card; 239 max-frequency = <26000000>; 240 sd-uhs-sdr25; 241 vmmc-supply = <&vmmcsd_fixed>; 242 status = "okay"; 243}; 244 245&rtc { 246 ti,no-init; 247}; 248 249&sham { 250 status = "okay"; 251}; 252 253&tps { 254 compatible = "ti,tps65217"; 255 ti,pmic-shutdown-controller; 256 257 regulators { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 261 dcdc1_reg: regulator@0 { 262 reg = <0>; 263 regulator-name = "vdds_dpr"; 264 regulator-compatible = "dcdc1"; 265 regulator-min-microvolt = <1300000>; 266 regulator-max-microvolt = <1450000>; 267 regulator-boot-on; 268 regulator-always-on; 269 }; 270 271 dcdc2_reg: regulator@1 { 272 reg = <1>; 273 /* 274 * VDD_MPU voltage limits 0.95V - 1.26V with 275 * +/-4% tolerance 276 */ 277 regulator-compatible = "dcdc2"; 278 regulator-name = "vdd_mpu"; 279 regulator-min-microvolt = <925000>; 280 regulator-max-microvolt = <1375000>; 281 regulator-boot-on; 282 regulator-always-on; 283 regulator-ramp-delay = <70000>; 284 }; 285 286 dcdc3_reg: regulator@2 { 287 reg = <2>; 288 /* 289 * VDD_CORE voltage limits 0.95V - 1.1V with 290 * +/-4% tolerance 291 */ 292 regulator-name = "vdd_core"; 293 regulator-compatible = "dcdc3"; 294 regulator-min-microvolt = <925000>; 295 regulator-max-microvolt = <1125000>; 296 regulator-boot-on; 297 regulator-always-on; 298 }; 299 300 ldo1_reg: regulator@3 { 301 reg = <3>; 302 regulator-name = "vio,vrtc,vdds"; 303 regulator-compatible = "ldo1"; 304 regulator-min-microvolt = <1000000>; 305 regulator-max-microvolt = <1800000>; 306 regulator-always-on; 307 }; 308 309 ldo2_reg: regulator@4 { 310 reg = <4>; 311 regulator-name = "vdd_3v3aux"; 312 regulator-compatible = "ldo2"; 313 regulator-min-microvolt = <900000>; 314 regulator-max-microvolt = <3300000>; 315 regulator-always-on; 316 }; 317 318 ldo3_reg: regulator@5 { 319 reg = <5>; 320 regulator-name = "vdd_1v8"; 321 regulator-compatible = "ldo3"; 322 regulator-min-microvolt = <900000>; 323 regulator-max-microvolt = <1800000>; 324 regulator-always-on; 325 }; 326 327 ldo4_reg: regulator@6 { 328 reg = <6>; 329 regulator-name = "vdd_3v3a"; 330 regulator-compatible = "ldo4"; 331 regulator-min-microvolt = <1800000>; 332 regulator-max-microvolt = <3300000>; 333 regulator-always-on; 334 }; 335 }; 336}; 337 338&uart0 { 339 pinctrl-names = "default"; 340 pinctrl-0 = <&uart0_pins>; 341 status = "okay"; 342}; 343 344&uart1 { 345 pinctrl-names = "default"; 346 pinctrl-0 = <&uart1_pins>; 347 status = "okay"; 348}; 349 350&uart2 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&uart2_pins>; 353 status = "okay"; 354}; 355 356&uart4 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&uart4_pins>; 359 status = "okay"; 360}; 361 362&usb { 363 status = "okay"; 364}; 365 366&usb_ctrl_mod { 367 status = "okay"; 368}; 369 370&usb1_phy { 371 status = "okay"; 372}; 373 374&usb1 { 375 status = "okay"; 376 dr_mode = "host"; 377}; 378 379&am33xx_pinmux { 380 pinctrl-names = "default"; 381 pinctrl-0 = <&clkout2_pin>; 382 383 clkout2_pin: pinmux_clkout2_pin { 384 pinctrl-single,pins = < 385 /* xdma_event_intr1.clkout2 */ 386 AM33XX_IOPAD(0x9b4, PIN_INPUT | MUX_MODE6) 387 >; 388 }; 389 390 cpsw_default: cpsw_default { 391 pinctrl-single,pins = < 392 /* Slave 1 */ 393 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE0) 394 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 395 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE0) 396 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 397 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) 398 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE0) 399 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE0) 400 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) 401 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE0) 402 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE0) 403 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE0) 404 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE0) 405 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE0) 406 >; 407 }; 408 409 cpsw_sleep: cpsw_sleep { 410 pinctrl-single,pins = < 411 /* Slave 1 reset value */ 412 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 413 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 414 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 415 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 416 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 417 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 418 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 419 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 420 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 421 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 422 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 423 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 424 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 425 >; 426 }; 427 428 davinci_mdio_default: davinci_mdio_default { 429 pinctrl-single,pins = < 430 /* mdio_data.mdio_data */ 431 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) 432 /* mdio_clk.mdio_clk */ 433 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) 434 >; 435 }; 436 437 davinci_mdio_sleep: davinci_mdio_sleep { 438 pinctrl-single,pins = < 439 /* MDIO reset value */ 440 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 441 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 442 >; 443 }; 444 445 ehrpwm1_pins: pinmux_ehrpwm1 { 446 pinctrl-single,pins = < 447 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.gpio1_19 */ 448 >; 449 }; 450 451 emmc_pins: pinmux_emmc_pins { 452 pinctrl-single,pins = < 453 AM33XX_IOPAD(0x880, PIN_INPUT | MUX_MODE2) 454 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 455 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) 456 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) 457 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) 458 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) 459 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) 460 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) 461 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) 462 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) 463 >; 464 }; 465 466 i2c0_pins: pinmux_i2c0_pins { 467 pinctrl-single,pins = < 468 AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) 469 AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) 470 >; 471 }; 472 473 mmc1_pins: pinmux_mmc1_pins { 474 pinctrl-single,pins = < 475 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE5) 476 >; 477 }; 478 479 mmc3_pins: pinmux_mmc3_pins { 480 pinctrl-single,pins = < 481 AM33XX_IOPAD(0x830, PIN_INPUT | MUX_MODE3) 482 AM33XX_IOPAD(0x834, PIN_INPUT | MUX_MODE3) 483 AM33XX_IOPAD(0x838, PIN_INPUT | MUX_MODE3) 484 AM33XX_IOPAD(0x83c, PIN_INPUT | MUX_MODE3) 485 AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE3) 486 AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE3) 487 >; 488 }; 489 490 uart0_pins: pinmux_uart0_pins { 491 pinctrl-single,pins = < 492 AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE0) 493 AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE0) 494 AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE0) 495 AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0) 496 >; 497 }; 498 499 uart1_pins: pinmux_uart1 { 500 pinctrl-single,pins = < 501 AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) 502 AM33XX_IOPAD(0x97C, PIN_OUTPUT | MUX_MODE0) 503 AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) 504 AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) 505 >; 506 }; 507 508 uart2_pins: pinmux_uart2_pins { 509 pinctrl-single,pins = < 510 AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) 511 AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) 512 >; 513 }; 514 515 uart4_pins: pinmux_uart4_pins { 516 pinctrl-single,pins = < 517 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) 518 AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE6) 519 >; 520 }; 521 522 user_leds_s0: user_leds_s0 { 523 pinctrl-single,pins = < 524 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE7) 525 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE7) 526 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) 527 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7) 528 AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7) 529 AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE7) 530 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7) 531 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 532 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) 533 AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) 534 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLUP | MUX_MODE7) 535 AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE7) 536 AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7) 537 AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7) 538 AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE7) 539 AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE7) 540 AM33XX_IOPAD(0x87c, PIN_INPUT | MUX_MODE7) 541 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7) 542 AM33XX_IOPAD(0x894, PIN_INPUT | MUX_MODE7) 543 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7) 544 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE7) 545 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE7) 546 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE7) 547 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE7) 548 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE7) 549 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE7) 550 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE7) 551 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE7) 552 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE7) 553 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE7) 554 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7) 555 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE7) 556 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE7) 557 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE7) 558 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE7) 559 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE7) 560 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) 561 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE7) 562 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE7) 563 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE7) 564 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE7) 565 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 566 AM33XX_IOPAD(0x958, PIN_OUTPUT | MUX_MODE7) 567 AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7) 568 AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7) 569 AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 570 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) 571 AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7) 572 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE7) 573 >; 574 }; 575}; 576