1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2013 Atmel Corporation 4 * Bo Shen <voice.shen@atmel.com> 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/arch/at91_common.h> 10 #include <asm/arch/at91_pit.h> 11 #include <asm/arch/at91_pmc.h> 12 #include <asm/arch/at91_rstc.h> 13 #include <asm/arch/at91_wdt.h> 14 #include <asm/arch/clk.h> 15 #include <spl.h> 16 switch_to_main_crystal_osc(void)17static void switch_to_main_crystal_osc(void) 18 { 19 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 20 u32 tmp; 21 22 tmp = readl(&pmc->mor); 23 tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); 24 tmp &= ~AT91_PMC_MOR_KEY(0xff); 25 tmp |= AT91_PMC_MOR_MOSCEN; 26 tmp |= AT91_PMC_MOR_OSCOUNT(8); 27 tmp |= AT91_PMC_MOR_KEY(0x37); 28 writel(tmp, &pmc->mor); 29 while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) 30 ; 31 32 #if defined(CONFIG_SAMA5D2) 33 /* Enable a measurement of the external oscillator */ 34 tmp = readl(&pmc->mcfr); 35 tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC; 36 tmp |= AT91_PMC_MCFR_RCMEAS; 37 writel(tmp, &pmc->mcfr); 38 39 while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY)) 40 ; 41 42 if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK)) 43 hang(); 44 #endif 45 46 tmp = readl(&pmc->mor); 47 /* 48 * some boards have an external oscillator with driving. 49 * in this case we need to disable the internal SoC driving (bypass mode) 50 */ 51 #if defined(CONFIG_SPL_AT91_MCK_BYPASS) 52 tmp |= AT91_PMC_MOR_OSCBYPASS; 53 #else 54 tmp &= ~AT91_PMC_MOR_OSCBYPASS; 55 #endif 56 tmp &= ~AT91_PMC_MOR_KEY(0xff); 57 tmp |= AT91_PMC_MOR_KEY(0x37); 58 writel(tmp, &pmc->mor); 59 60 tmp = readl(&pmc->mor); 61 tmp |= AT91_PMC_MOR_MOSCSEL; 62 tmp &= ~AT91_PMC_MOR_KEY(0xff); 63 tmp |= AT91_PMC_MOR_KEY(0x37); 64 writel(tmp, &pmc->mor); 65 66 while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) 67 ; 68 69 #if !defined(CONFIG_SAMA5D2) 70 /* Wait until MAINRDY field is set to make sure main clock is stable */ 71 while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY)) 72 ; 73 #endif 74 75 #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2) 76 tmp = readl(&pmc->mor); 77 tmp &= ~AT91_PMC_MOR_MOSCRCEN; 78 tmp &= ~AT91_PMC_MOR_KEY(0xff); 79 tmp |= AT91_PMC_MOR_KEY(0x37); 80 writel(tmp, &pmc->mor); 81 #endif 82 } 83 matrix_init(void)84__weak void matrix_init(void) 85 { 86 /* This only be used for sama5d4 soc now */ 87 } 88 redirect_int_from_saic_to_aic(void)89__weak void redirect_int_from_saic_to_aic(void) 90 { 91 /* This only be used for sama5d4 soc now */ 92 } 93 94 /* empty stub to satisfy current lowlevel_init, can be removed any time */ s_init(void)95void s_init(void) 96 { 97 } 98 board_init_f(ulong dummy)99void board_init_f(ulong dummy) 100 { 101 int ret; 102 103 switch_to_main_crystal_osc(); 104 105 #ifdef CONFIG_SAMA5D2 106 configure_2nd_sram_as_l2_cache(); 107 #endif 108 109 #if !defined(CONFIG_WDT_AT91) 110 /* disable watchdog */ 111 at91_disable_wdt(); 112 #endif 113 114 /* PMC configuration */ 115 at91_pmc_init(); 116 117 at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); 118 119 matrix_init(); 120 121 redirect_int_from_saic_to_aic(); 122 123 timer_init(); 124 125 board_early_init_f(); 126 127 mem_init(); 128 129 ret = spl_init(); 130 if (ret) { 131 debug("spl_init() failed: %d\n", ret); 132 hang(); 133 } 134 135 preloader_console_init(); 136 137 } 138