1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * (C) Copyright 2012 Stephen Warren
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 */
8
9 #include <common.h>
10 #include <asm/io.h>
11 #include <asm/arch/base.h>
12 #include <asm/arch/wdog.h>
13 #include <efi_loader.h>
14
15 #define RESET_TIMEOUT 10
16
17 /*
18 * The Raspberry Pi firmware uses the RSTS register to know which partiton
19 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
20 * Partiton 63 is a special partition used by the firmware to indicate halt.
21 */
22 #define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT 0x555
23
24 /* max ticks timeout */
25 #define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff
26
hw_watchdog_disable(void)27 void hw_watchdog_disable(void) {}
28
29 __efi_runtime_data struct bcm2835_wdog_regs *wdog_regs;
30
31 static void __efi_runtime
__reset_cpu(struct bcm2835_wdog_regs * wdog_regs,ulong ticks)32 __reset_cpu(struct bcm2835_wdog_regs *wdog_regs, ulong ticks)
33 {
34 uint32_t rstc, timeout;
35
36 if (ticks == 0) {
37 hw_watchdog_disable();
38 timeout = RESET_TIMEOUT;
39 } else
40 timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
41
42 rstc = readl(&wdog_regs->rstc);
43 rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
44 rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
45
46 writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
47 writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
48 }
49
reset_cpu(ulong ticks)50 void reset_cpu(ulong ticks)
51 {
52 struct bcm2835_wdog_regs *regs =
53 (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
54
55 __reset_cpu(regs, 0);
56 }
57
58 #ifdef CONFIG_EFI_LOADER
59
efi_reset_system(enum efi_reset_type reset_type,efi_status_t reset_status,unsigned long data_size,void * reset_data)60 void __efi_runtime EFIAPI efi_reset_system(
61 enum efi_reset_type reset_type,
62 efi_status_t reset_status,
63 unsigned long data_size, void *reset_data)
64 {
65 u32 val;
66
67 if (reset_type == EFI_RESET_COLD ||
68 reset_type == EFI_RESET_WARM ||
69 reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
70 __reset_cpu(wdog_regs, 0);
71 } else if (reset_type == EFI_RESET_SHUTDOWN) {
72 /*
73 * We set the watchdog hard reset bit here to distinguish this reset
74 * from the normal (full) reset. bootcode.bin will not reboot after a
75 * hard reset.
76 */
77 val = readl(&wdog_regs->rsts);
78 val |= BCM2835_WDOG_PASSWORD;
79 val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
80 writel(val, &wdog_regs->rsts);
81 __reset_cpu(wdog_regs, 0);
82 }
83
84 while (1) { }
85 }
86
efi_reset_system_init(void)87 efi_status_t efi_reset_system_init(void)
88 {
89 wdog_regs = (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
90 return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
91 }
92
93 #endif
94