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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *
4  * Common functions for OMAP4/5 based boards
5  *
6  * (C) Copyright 2010
7  * Texas Instruments, <www.ti.com>
8  *
9  * Author :
10  *	Aneesh V	<aneesh@ti.com>
11  *	Steve Sakoman	<steve@sakoman.com>
12  */
13 #include <common.h>
14 #include <debug_uart.h>
15 #include <fdtdec.h>
16 #include <spl.h>
17 #include <asm/arch/sys_proto.h>
18 #include <linux/sizes.h>
19 #include <asm/emif.h>
20 #include <asm/omap_common.h>
21 #include <linux/compiler.h>
22 #include <asm/system.h>
23 #include <dm/root.h>
24 
25 DECLARE_GLOBAL_DATA_PTR;
26 
do_set_mux(u32 base,struct pad_conf_entry const * array,int size)27 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
28 {
29 	int i;
30 	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
31 
32 	for (i = 0; i < size; i++, pad++)
33 		writew(pad->val, base + pad->offset);
34 }
35 
set_mux_conf_regs(void)36 static void set_mux_conf_regs(void)
37 {
38 	switch (omap_hw_init_context()) {
39 	case OMAP_INIT_CONTEXT_SPL:
40 		set_muxconf_regs();
41 		break;
42 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
43 		break;
44 	case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
45 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
46 		set_muxconf_regs();
47 		break;
48 	}
49 }
50 
cortex_rev(void)51 u32 cortex_rev(void)
52 {
53 
54 	unsigned int rev;
55 
56 	/* Read Main ID Register (MIDR) */
57 	asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
58 
59 	return rev;
60 }
61 
omap_rev_string(void)62 static void omap_rev_string(void)
63 {
64 	u32 omap_rev = omap_revision();
65 	u32 soc_variant	= (omap_rev & 0xF0000000) >> 28;
66 	u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
67 	u32 major_rev = (omap_rev & 0x00000F00) >> 8;
68 	u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
69 
70 	const char *sec_s, *package = NULL;
71 
72 	switch (get_device_type()) {
73 	case TST_DEVICE:
74 		sec_s = "TST";
75 		break;
76 	case EMU_DEVICE:
77 		sec_s = "EMU";
78 		break;
79 	case HS_DEVICE:
80 		sec_s = "HS";
81 		break;
82 	case GP_DEVICE:
83 		sec_s = "GP";
84 		break;
85 	default:
86 		sec_s = "?";
87 	}
88 
89 #if defined(CONFIG_DRA7XX)
90 	if (is_dra76x()) {
91 		switch (omap_rev & 0xF) {
92 		case DRA762_ABZ_PACKAGE:
93 			package = "ABZ";
94 			break;
95 		case DRA762_ACD_PACKAGE:
96 		default:
97 			package = "ACD";
98 			break;
99 		}
100 	}
101 #endif
102 
103 	if (soc_variant)
104 		printf("OMAP");
105 	else
106 		printf("DRA");
107 	printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
108 	if (package)
109 		printf(" %s package\n", package);
110 	else
111 		puts("\n");
112 }
113 
114 #ifdef CONFIG_SPL_BUILD
spl_display_print(void)115 void spl_display_print(void)
116 {
117 	omap_rev_string();
118 }
119 #endif
120 
srcomp_enable(void)121 void __weak srcomp_enable(void)
122 {
123 }
124 
125 /**
126  * do_board_detect() - Detect board description
127  *
128  * Function to detect board description. This is expected to be
129  * overridden in the SoC family board file where desired.
130  */
do_board_detect(void)131 void __weak do_board_detect(void)
132 {
133 }
134 
135 /**
136  * vcores_init() - Assign omap_vcores based on board
137  *
138  * Function to pick the vcores based on board. This is expected to be
139  * overridden in the SoC family board file where desired.
140  */
vcores_init(void)141 void __weak vcores_init(void)
142 {
143 }
144 
s_init(void)145 void s_init(void)
146 {
147 }
148 
149 /**
150  * init_package_revision() - Initialize package revision
151  *
152  * Function to get the pacakage information. This is expected to be
153  * overridden in the SoC family file where desired.
154  */
init_package_revision(void)155 void __weak init_package_revision(void)
156 {
157 }
158 
159 /**
160  * early_system_init - Does Early system initialization.
161  *
162  * Does early system init of watchdog, muxing,  andclocks
163  * Watchdog disable is done always. For the rest what gets done
164  * depends on the boot mode in which this function is executed when
165  *   1. SPL running from SRAM
166  *   2. U-Boot running from FLASH
167  *   3. U-Boot loaded to SDRAM by SPL
168  *   4. U-Boot loaded to SDRAM by ROM code using the
169  *	Configuration Header feature
170  * Please have a look at the respective functions to see what gets
171  * done in each of these cases
172  * This function is called with SRAM stack.
173  */
early_system_init(void)174 void early_system_init(void)
175 {
176 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
177 	int ret;
178 	int rescan;
179 #endif
180 	init_omap_revision();
181 	hw_data_init();
182 	init_package_revision();
183 
184 #ifdef CONFIG_SPL_BUILD
185 	if (warm_reset())
186 		force_emif_self_refresh();
187 #endif
188 	watchdog_init();
189 	set_mux_conf_regs();
190 #ifdef CONFIG_SPL_BUILD
191 	srcomp_enable();
192 	do_io_settings();
193 #endif
194 	setup_early_clocks();
195 
196 #ifdef CONFIG_SPL_BUILD
197 	/*
198 	 * Save the boot parameters passed from romcode.
199 	 * We cannot delay the saving further than this,
200 	 * to prevent overwrites.
201 	 */
202 	save_omap_boot_params();
203 	spl_early_init();
204 #endif
205 	do_board_detect();
206 
207 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
208 	/*
209 	 * Board detection has been done.
210 	 * Let us see if another dtb wouldn't be a better match
211 	 * for our board
212 	 */
213 	ret = fdtdec_resetup(&rescan);
214 	if (!ret && rescan) {
215 		dm_uninit();
216 		dm_init_and_scan(true);
217 	}
218 #endif
219 
220 	vcores_init();
221 #ifdef CONFIG_DEBUG_UART_OMAP
222 	debug_uart_init();
223 #endif
224 	prcm_init();
225 }
226 
227 #ifdef CONFIG_SPL_BUILD
board_init_f(ulong dummy)228 void board_init_f(ulong dummy)
229 {
230 	early_system_init();
231 #ifdef CONFIG_BOARD_EARLY_INIT_F
232 	board_early_init_f();
233 #endif
234 	/* For regular u-boot sdram_init() is called from dram_init() */
235 	sdram_init();
236 	gd->ram_size = omap_sdram_size();
237 }
238 #endif
239 
arch_cpu_init_dm(void)240 int arch_cpu_init_dm(void)
241 {
242 	early_system_init();
243 	return 0;
244 }
245 
246 /*
247  * Routine: wait_for_command_complete
248  * Description: Wait for posting to finish on watchdog
249  */
wait_for_command_complete(struct watchdog * wd_base)250 void wait_for_command_complete(struct watchdog *wd_base)
251 {
252 	int pending = 1;
253 	do {
254 		pending = readl(&wd_base->wwps);
255 	} while (pending);
256 }
257 
258 /*
259  * Routine: watchdog_init
260  * Description: Shut down watch dogs
261  */
watchdog_init(void)262 void watchdog_init(void)
263 {
264 	struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
265 
266 	writel(WD_UNLOCK1, &wd2_base->wspr);
267 	wait_for_command_complete(wd2_base);
268 	writel(WD_UNLOCK2, &wd2_base->wspr);
269 }
270 
271 
272 /*
273  * This function finds the SDRAM size available in the system
274  * based on DMM section configurations
275  * This is needed because the size of memory installed may be
276  * different on different versions of the board
277  */
omap_sdram_size(void)278 u32 omap_sdram_size(void)
279 {
280 	u32 section, i, valid;
281 	u64 sdram_start = 0, sdram_end = 0, addr,
282 	    size, total_size = 0, trap_size = 0, trap_start = 0;
283 
284 	for (i = 0; i < 4; i++) {
285 		section	= __raw_readl(DMM_BASE + i*4);
286 		valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
287 			(EMIF_SDRC_ADDRSPC_SHIFT);
288 		addr = section & EMIF_SYS_ADDR_MASK;
289 
290 		/* See if the address is valid */
291 		if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
292 		    (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
293 			size = ((section & EMIF_SYS_SIZE_MASK) >>
294 				   EMIF_SYS_SIZE_SHIFT);
295 			size = 1 << size;
296 			size *= SZ_16M;
297 
298 			if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
299 				if (!sdram_start || (addr < sdram_start))
300 					sdram_start = addr;
301 				if (!sdram_end || ((addr + size) > sdram_end))
302 					sdram_end = addr + size;
303 			} else {
304 				trap_size = size;
305 				trap_start = addr;
306 			}
307 		}
308 	}
309 
310 	if ((trap_start >= sdram_start) && (trap_start < sdram_end))
311 		total_size = (sdram_end - sdram_start) - (trap_size);
312 	else
313 		total_size = sdram_end - sdram_start;
314 
315 	return total_size;
316 }
317 
318 
319 /*
320  * Routine: dram_init
321  * Description: sets uboots idea of sdram size
322  */
dram_init(void)323 int dram_init(void)
324 {
325 	sdram_init();
326 	gd->ram_size = omap_sdram_size();
327 	return 0;
328 }
329 
330 /*
331  * Print board information
332  */
checkboard(void)333 int checkboard(void)
334 {
335 	puts(sysinfo.board_string);
336 	return 0;
337 }
338 
339 #if defined(CONFIG_DISPLAY_CPUINFO)
340 /*
341  * Print CPU information
342  */
print_cpuinfo(void)343 int print_cpuinfo(void)
344 {
345 	puts("CPU  : ");
346 	omap_rev_string();
347 
348 	return 0;
349 }
350 #endif
351