1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <ram.h>
10 #include <spl.h>
11 #include <asm/arch-rockchip/bootrom.h>
12 #include <asm/io.h>
13
14 DECLARE_GLOBAL_DATA_PTR;
15
board_return_to_bootrom(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)16 int board_return_to_bootrom(struct spl_image_info *spl_image,
17 struct spl_boot_device *bootdev)
18 {
19 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
20
21 return 0;
22 }
23
24 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
25 };
26
board_spl_was_booted_from(void)27 const char *board_spl_was_booted_from(void)
28 {
29 u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
30 const char *bootdevice_ofpath = NULL;
31
32 if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
33 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
34
35 if (bootdevice_ofpath)
36 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
37 __func__, bootdevice_brom_id, bootdevice_ofpath);
38 else
39 debug("%s: failed to resolve brom_bootdevice_id %x\n",
40 __func__, bootdevice_brom_id);
41
42 return bootdevice_ofpath;
43 }
44
spl_boot_device(void)45 u32 spl_boot_device(void)
46 {
47 u32 boot_device = BOOT_DEVICE_MMC1;
48
49 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
50 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
51 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
52 return BOOT_DEVICE_SPI;
53 #endif
54 if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
55 return BOOT_DEVICE_BOOTROM;
56
57 return boot_device;
58 }
59
spl_boot_mode(const u32 boot_device)60 u32 spl_boot_mode(const u32 boot_device)
61 {
62 return MMCSD_MODE_RAW;
63 }
64
65 #if !defined(CONFIG_ROCKCHIP_RK3188)
66 #define TIMER_LOAD_COUNT_L 0x00
67 #define TIMER_LOAD_COUNT_H 0x04
68 #define TIMER_CONTROL_REG 0x10
69 #define TIMER_EN 0x1
70 #define TIMER_FMODE BIT(0)
71 #define TIMER_RMODE BIT(1)
72
rockchip_stimer_init(void)73 __weak void rockchip_stimer_init(void)
74 {
75 /* If Timer already enabled, don't re-init it */
76 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
77
78 if (reg & TIMER_EN)
79 return;
80 #ifndef CONFIG_ARM64
81 asm volatile("mcr p15, 0, %0, c14, c0, 0"
82 : : "r"(COUNTER_FREQUENCY));
83 #endif
84 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
85 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
86 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
87 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
88 TIMER_CONTROL_REG);
89 }
90 #endif
91
board_early_init_f(void)92 __weak int board_early_init_f(void)
93 {
94 return 0;
95 }
96
arch_cpu_init(void)97 __weak int arch_cpu_init(void)
98 {
99 return 0;
100 }
101
board_init_f(ulong dummy)102 void board_init_f(ulong dummy)
103 {
104 int ret;
105 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
106 struct udevice *dev;
107 #endif
108
109 #ifdef CONFIG_DEBUG_UART
110 /*
111 * Debug UART can be used from here if required:
112 *
113 * debug_uart_init();
114 * printch('a');
115 * printhex8(0x1234);
116 * printascii("string");
117 */
118 debug_uart_init();
119 debug("\nspl:debug uart enabled in %s\n", __func__);
120 #endif
121
122 board_early_init_f();
123
124 ret = spl_early_init();
125 if (ret) {
126 printf("spl_early_init() failed: %d\n", ret);
127 hang();
128 }
129 arch_cpu_init();
130 #if !defined(CONFIG_ROCKCHIP_RK3188)
131 rockchip_stimer_init();
132 #endif
133 #ifdef CONFIG_SYS_ARCH_TIMER
134 /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
135 timer_init();
136 #endif
137 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
138 debug("\nspl:init dram\n");
139 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
140 if (ret) {
141 printf("DRAM init failed: %d\n", ret);
142 return;
143 }
144 #endif
145 preloader_console_init();
146 }
147
148 #ifdef CONFIG_SPL_LOAD_FIT
board_fit_config_name_match(const char * name)149 int board_fit_config_name_match(const char *name)
150 {
151 /* Just empty function now - can't decide what to choose */
152 debug("%s: %s\n", __func__, name);
153
154 return 0;
155 }
156 #endif
157