1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018 Stefan Roese <sr@denx.de>
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <ram.h>
9 #include <wdt.h>
10 #include <asm/io.h>
11 #include <linux/io.h>
12 #include <linux/sizes.h>
13 #include "mt76xx.h"
14
15 #define STR_LEN 6
16
17 #ifdef CONFIG_BOOT_ROM
mach_cpu_init(void)18 int mach_cpu_init(void)
19 {
20 ddr_calibrate();
21
22 return 0;
23 }
24 #endif
25
dram_init(void)26 int dram_init(void)
27 {
28 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_256M);
29
30 return 0;
31 }
32
print_cpuinfo(void)33 int print_cpuinfo(void)
34 {
35 static const char * const boot_str[] = { "PLL (3-Byte SPI Addr)",
36 "PLL (4-Byte SPI Addr)",
37 "XTAL (3-Byte SPI Addr)",
38 "XTAL (4-Byte SPI Addr)" };
39 const void *blob = gd->fdt_blob;
40 void __iomem *sysc_base;
41 char buf[STR_LEN + 1];
42 fdt_addr_t base;
43 fdt_size_t size;
44 char *str;
45 int node;
46 u32 val;
47
48 /* Get system controller base address */
49 node = fdt_node_offset_by_compatible(blob, -1, "ralink,mt7620a-sysc");
50 if (node < 0)
51 return -FDT_ERR_NOTFOUND;
52
53 base = fdtdec_get_addr_size_auto_noparent(blob, node, "reg",
54 0, &size, true);
55 if (base == FDT_ADDR_T_NONE)
56 return -EINVAL;
57
58 sysc_base = ioremap_nocache(base, size);
59
60 str = (char *)sysc_base + MT76XX_CHIPID_OFFS;
61 snprintf(buf, STR_LEN + 1, "%s", str);
62 val = readl(sysc_base + MT76XX_CHIP_REV_ID_OFFS);
63 printf("CPU: %-*s Rev %ld.%ld - ", STR_LEN, buf,
64 (val & GENMASK(11, 8)) >> 8, val & GENMASK(3, 0));
65
66 val = (readl(sysc_base + MT76XX_SYSCFG0_OFFS) & GENMASK(3, 1)) >> 1;
67 printf("Boot from %s\n", boot_str[val]);
68
69 return 0;
70 }
71
last_stage_init(void)72 int last_stage_init(void)
73 {
74 void *src, *dst;
75
76 src = malloc(SZ_64K);
77 dst = malloc(SZ_64K);
78 if (!src || !dst) {
79 printf("Can't allocate buffer for cache cleanup copy!\n");
80 return 0;
81 }
82
83 /*
84 * It has been noticed, that sometimes the d-cache is not in a
85 * "clean-state" when U-Boot is running on MT7688. This was
86 * detected when using the ethernet driver (which uses d-cache)
87 * and a TFTP command does not complete. Copying an area of 64KiB
88 * in DDR at a very late bootup time in U-Boot, directly before
89 * calling into the prompt, seems to fix this issue.
90 */
91 memcpy(dst, src, SZ_64K);
92 free(src);
93 free(dst);
94
95 return 0;
96 }
97