1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2019, Rick Chen <rick@andestech.com> 4 * 5 * U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT). 6 * The PLMT block holds memory-mapped mtime register 7 * associated with timer tick. 8 */ 9 10 #include <common.h> 11 #include <dm.h> 12 #include <regmap.h> 13 #include <syscon.h> 14 #include <asm/io.h> 15 #include <asm/syscon.h> 16 17 /* mtime register */ 18 #define MTIME_REG(base) ((ulong)(base)) 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 #define PLMT_BASE_GET(void) \ 23 do { \ 24 long *ret; \ 25 \ 26 if (!gd->arch.plmt) { \ 27 ret = syscon_get_first_range(RISCV_SYSCON_PLMT); \ 28 if (IS_ERR(ret)) \ 29 return PTR_ERR(ret); \ 30 gd->arch.plmt = ret; \ 31 } \ 32 } while (0) 33 riscv_get_time(u64 * time)34int riscv_get_time(u64 *time) 35 { 36 PLMT_BASE_GET(); 37 38 *time = readq((void __iomem *)MTIME_REG(gd->arch.plmt)); 39 40 return 0; 41 } 42 43 static const struct udevice_id andes_plmt_ids[] = { 44 { .compatible = "riscv,plmt0", .data = RISCV_SYSCON_PLMT }, 45 { } 46 }; 47 48 U_BOOT_DRIVER(andes_plmt) = { 49 .name = "andes_plmt", 50 .id = UCLASS_SYSCON, 51 .of_match = andes_plmt_ids, 52 .flags = DM_FLAG_PRE_RELOC, 53 }; 54