1/dts-v1/; 2 3#include <dt-bindings/gpio/x86-gpio.h> 4 5/include/ "skeleton.dtsi" 6/include/ "keyboard.dtsi" 7/include/ "serial.dtsi" 8/include/ "reset.dtsi" 9/include/ "rtc.dtsi" 10/include/ "tsc_timer.dtsi" 11 12#ifdef CONFIG_CHROMEOS 13#include "chromeos-x86.dtsi" 14#include "flashmap-x86-ro.dtsi" 15#include "flashmap-8mb-rw.dtsi" 16#endif 17 18/ { 19 model = "Google Samus"; 20 compatible = "google,samus", "intel,broadwell"; 21 22 aliases { 23 spi0 = &spi; 24 usb0 = &usb_0; 25 usb1 = &usb_1; 26 cros-ec0 = &cros_ec; 27 }; 28 29 config { 30 silent_console = <0>; 31 }; 32 33 cpus { 34 #address-cells = <1>; 35 #size-cells = <0>; 36 37 cpu@0 { 38 device_type = "cpu"; 39 compatible = "intel,core-i3-gen5"; 40 reg = <0>; 41 intel,apic-id = <0>; 42 intel,slow-ramp = <3>; 43 }; 44 45 cpu@1 { 46 device_type = "cpu"; 47 compatible = "intel,core-i3-gen5"; 48 reg = <1>; 49 intel,apic-id = <1>; 50 }; 51 52 cpu@2 { 53 device_type = "cpu"; 54 compatible = "intel,core-i3-gen5"; 55 reg = <2>; 56 intel,apic-id = <2>; 57 }; 58 59 cpu@3 { 60 device_type = "cpu"; 61 compatible = "intel,core-i3-gen5"; 62 reg = <3>; 63 intel,apic-id = <3>; 64 }; 65 66 }; 67 68 chosen { 69 stdout-path = "/serial"; 70 }; 71 72 keyboard { 73 intel,duplicate-por; 74 }; 75 76 pch_pinctrl { 77 compatible = "intel,x86-broadwell-pinctrl"; 78 u-boot,dm-pre-reloc; 79 reg = <0 0>; 80 81 /* Put this first: it is the default */ 82 gpio_unused: gpio-unused { 83 u-boot,dm-pre-reloc; 84 mode-gpio; 85 direction = <PIN_INPUT>; 86 owner = <OWNER_GPIO>; 87 sense-disable; 88 }; 89 90 gpio_acpi_sci: acpi-sci { 91 u-boot,dm-pre-reloc; 92 mode-gpio; 93 direction = <PIN_INPUT>; 94 invert; 95 route = <ROUTE_SCI>; 96 }; 97 98 gpio_acpi_smi: acpi-smi { 99 u-boot,dm-pre-reloc; 100 mode-gpio; 101 direction = <PIN_INPUT>; 102 invert; 103 route = <ROUTE_SMI>; 104 }; 105 106 gpio_input: gpio-input { 107 u-boot,dm-pre-reloc; 108 mode-gpio; 109 direction = <PIN_INPUT>; 110 owner = <OWNER_GPIO>; 111 }; 112 113 gpio_input_invert: gpio-input-invert { 114 u-boot,dm-pre-reloc; 115 mode-gpio; 116 direction = <PIN_INPUT>; 117 owner = <OWNER_GPIO>; 118 invert; 119 }; 120 121 gpio_native: gpio-native { 122 u-boot,dm-pre-reloc; 123 }; 124 125 gpio_out_high: gpio-out-high { 126 u-boot,dm-pre-reloc; 127 mode-gpio; 128 direction = <PIN_OUTPUT>; 129 output-value = <1>; 130 owner = <OWNER_GPIO>; 131 sense-disable; 132 }; 133 134 gpio_out_low: gpio-out-low { 135 u-boot,dm-pre-reloc; 136 mode-gpio; 137 direction = <PIN_OUTPUT>; 138 output-value = <0>; 139 owner = <OWNER_GPIO>; 140 sense-disable; 141 }; 142 143 gpio_pirq: gpio-pirq { 144 u-boot,dm-pre-reloc; 145 mode-gpio; 146 direction = <PIN_INPUT>; 147 owner = <OWNER_GPIO>; 148 pirq-apic = <PIRQ_APIC_ROUTE>; 149 }; 150 151 soc_gpio@0 { 152 u-boot,dm-pre-reloc; 153 config = 154 <0 &gpio_unused 0>, /* unused */ 155 <1 &gpio_unused 0>, /* unused */ 156 <2 &gpio_unused 0>, /* unused */ 157 <3 &gpio_unused 0>, /* unused */ 158 <4 &gpio_native 0>, /* native: i2c0_sda_gpio4 */ 159 <5 &gpio_native 0>, /* native: i2c0_scl_gpio5 */ 160 <6 &gpio_native 0>, /* native: i2c1_sda_gpio6 */ 161 <7 &gpio_native 0>, /* native: i2c1_scl_gpio7 */ 162 <8 &gpio_acpi_sci 0>, /* pch_lte_wake_l */ 163 <9 &gpio_input_invert 0>, /* trackpad_int_l (wake) */ 164 <10 &gpio_acpi_sci 0>, /* pch_wlan_wake_l */ 165 <11 &gpio_unused 0>, /* unused */ 166 <12 &gpio_unused 0>, /* unused */ 167 <13 &gpio_pirq 3>, /* trackpad_int_l (pirql) */ 168 <14 &gpio_pirq 4>, /* touch_int_l (pirqm) */ 169 <15 &gpio_unused 0>, /* unused (strap) */ 170 <16 &gpio_input 0>, /* pch_wp */ 171 <17 &gpio_unused 0>, /* unused */ 172 <18 &gpio_unused 0>, /* unused */ 173 <19 &gpio_unused 0>, /* unused */ 174 <20 &gpio_native 0>, /* pcie_wlan_clkreq_l */ 175 <21 &gpio_out_high 0>, /* pp3300_ssd_en */ 176 <22 &gpio_unused 0>, /* unused */ 177 <23 &gpio_out_low 0>, /* pp3300_autobahn_en */ 178 <24 &gpio_unused 0>, /* unused */ 179 <25 &gpio_input 0>, /* ec_in_rw */ 180 <26 &gpio_unused 0>, /* unused */ 181 <27 &gpio_acpi_sci 0>, /* pch_wake_l */ 182 <28 &gpio_unused 0>, /* unused */ 183 <29 &gpio_unused 0>, /* unused */ 184 <30 &gpio_native 0>, /* native: pch_suswarn_l */ 185 <31 &gpio_native 0>, /* native: acok_buf */ 186 <32 &gpio_native 0>, /* native: lpc_clkrun_l */ 187 <33 &gpio_native 0>, /* native: ssd_devslp */ 188 <34 &gpio_acpi_smi 0>, /* ec_smi_l */ 189 <35 &gpio_acpi_smi 0>, /* pch_nmi_dbg_l (route in nmi_en) */ 190 <36 &gpio_acpi_sci 0>, /* ec_sci_l */ 191 <37 &gpio_unused 0>, /* unused */ 192 <38 &gpio_unused 0>, /* unused */ 193 <39 &gpio_unused 0>, /* unused */ 194 <40 &gpio_native 0>, /* native: pch_usb1_oc_l */ 195 <41 &gpio_native 0>, /* native: pch_usb2_oc_l */ 196 <42 &gpio_unused 0>, /* wlan_disable_l */ 197 <43 &gpio_out_high 0>, /* pp1800_codec_en */ 198 <44 &gpio_unused 0>, /* unused */ 199 <45 &gpio_acpi_sci 0>, /* dsp_int - codec wake */ 200 <46 &gpio_pirq 6>, /* hotword_det_l_3v3 (pirqo) - codec irq */ 201 <47 &gpio_out_low 0>, /* ssd_reset_l */ 202 <48 &gpio_unused 0>, /* unused */ 203 <49 &gpio_unused 0>, /* unused */ 204 <50 &gpio_unused 0>, /* unused */ 205 <51 &gpio_unused 0>, /* unused */ 206 <52 &gpio_input 0>, /* sim_det */ 207 <53 &gpio_unused 0>, /* unused */ 208 <54 &gpio_unused 0>, /* unused */ 209 <55 &gpio_unused 0>, /* unused */ 210 <56 &gpio_unused 0>, /* unused */ 211 <57 &gpio_out_high 0>, /* codec_reset_l */ 212 <58 &gpio_unused 0>, /* unused */ 213 <59 &gpio_out_high 0>, /* lte_disable_l */ 214 <60 &gpio_unused 0>, /* unused */ 215 <61 &gpio_native 0>, /* native: pch_sus_stat */ 216 <62 &gpio_native 0>, /* native: pch_susclk */ 217 <63 &gpio_native 0>, /* native: pch_slp_s5_l */ 218 <64 &gpio_unused 0>, /* unused */ 219 <65 &gpio_input 0>, /* ram_id3 */ 220 <66 &gpio_input 0>, /* ram_id3_old (strap) */ 221 <67 &gpio_input 0>, /* ram_id0 */ 222 <68 &gpio_input 0>, /* ram_id1 */ 223 <69 &gpio_input 0>, /* ram_id2 */ 224 <70 &gpio_unused 0>, /* unused */ 225 <71 &gpio_native 0>, /* native: modphy_en */ 226 <72 &gpio_unused 0>, /* unused */ 227 <73 &gpio_unused 0>, /* unused */ 228 <74 &gpio_unused 0>, /* unused */ 229 <75 &gpio_unused 0>, /* unused */ 230 <76 &gpio_unused 0>, /* unused */ 231 <77 &gpio_unused 0>, /* unused */ 232 <78 &gpio_unused 0>, /* unused */ 233 <79 &gpio_unused 0>, /* unused */ 234 <80 &gpio_unused 0>, /* unused */ 235 <81 &gpio_unused 0>, /* unused */ 236 <82 &gpio_native 0>, /* native: ec_rcin_l */ 237 <83 &gpio_native 0>, /* gspi0_cs */ 238 <84 &gpio_native 0>, /* gspi0_clk */ 239 <85 &gpio_native 0>, /* gspi0_miso */ 240 <86 &gpio_native 0>, /* gspi0_mosi (strap) */ 241 <87 &gpio_unused 0>, /* unused */ 242 <88 &gpio_unused 0>, /* unused */ 243 <89 &gpio_out_high 0>, /* pp3300_sd_en */ 244 <90 &gpio_unused 0>, /* unused */ 245 <91 &gpio_unused 0>, /* unused */ 246 <92 &gpio_unused 0>, /* unused */ 247 <93 &gpio_unused 0>, /* unused */ 248 <94 &gpio_unused 0>; /* unused */ 249 }; 250 }; 251 252 pci { 253 compatible = "pci-x86"; 254 #address-cells = <3>; 255 #size-cells = <2>; 256 u-boot,dm-pre-reloc; 257 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 258 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 259 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 260 261 northbridge@0,0 { 262 reg = <0x00000000 0 0 0 0>; 263 compatible = "intel,broadwell-northbridge"; 264 board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, 265 <&gpio_c 3 0>, <&gpio_c 1 0>; 266 u-boot,dm-pre-reloc; 267 spd { 268 #address-cells = <1>; 269 #size-cells = <0>; 270 u-boot,dm-pre-reloc; 271 samsung_4 { 272 reg = <6>; 273 u-boot,dm-pre-reloc; 274 data = [91 20 f1 03 04 11 05 0b 275 03 11 01 08 0a 00 50 01 276 78 78 90 50 90 11 50 e0 277 10 04 3c 3c 01 90 00 00 278 00 80 00 00 00 00 00 a8 279 00 00 00 00 00 00 00 00 280 00 00 00 00 00 00 00 00 281 00 00 00 00 0f 11 02 00 282 00 00 00 00 00 00 00 00 283 00 00 00 00 00 00 00 00 284 00 00 00 00 00 00 00 00 285 00 00 00 00 00 00 00 00 286 00 00 00 00 00 00 00 00 287 00 00 00 00 00 00 00 00 288 00 00 00 00 00 80 ce 01 289 00 00 55 00 00 00 00 00 290 4b 34 45 38 45 33 30 34 291 45 44 2d 45 47 43 45 20 292 20 20 00 00 80 ce 00 00 293 00 00 00 00 00 00 00 00 294 00 00 00 00 00 00 00 00 295 00 00 00 00 00 00 00 00 296 00 00 00 00 00 00 00 00 297 00 00 00 00 00 00 00 00 298 00 00 00 00 00 00 00 00 299 00 00 00 00 00 00 00 00 300 00 00 00 00 00 00 00 00 301 00 00 00 00 00 00 00 00 302 00 00 00 00 00 00 00 00 303 00 00 00 00 00 00 00 00 304 00 00 00 00 00 00 00 00 305 00 00 00 00 00 00 00 00]; 306 }; 307 hynix-h9ccnnnbltmlar-ntm-lpddr3-32 { 308 /* 309 * banks 8, ranks 2, rows 14, 310 * columns 10, density 4096 mb, x32 311 */ 312 reg = <8>; 313 u-boot,dm-pre-reloc; 314 data = [91 20 f1 03 04 11 05 0b 315 03 11 01 08 0a 00 50 01 316 78 78 90 50 90 11 50 e0 317 10 04 3c 3c 01 90 00 00 318 00 80 00 00 00 00 00 a8 319 00 00 00 00 00 00 00 00 320 00 00 00 00 00 00 00 00 321 00 00 00 00 0f 01 02 00 322 00 00 00 00 00 00 00 00 323 00 00 00 00 00 00 00 00 324 00 00 00 00 00 00 00 00 325 00 00 00 00 00 00 00 00 326 00 00 00 00 00 00 00 00 327 00 00 00 00 00 00 00 00 328 00 00 00 00 00 80 ad 00 329 00 00 55 00 00 00 00 00 330 48 39 43 43 4e 4e 4e 42 331 4c 54 4d 4c 41 52 2d 4e 332 54 4d 00 00 80 ad 00 00 333 00 00 00 00 00 00 00 00 334 00 00 00 00 00 00 00 00 335 00 00 00 00 00 00 00 00 336 00 00 00 00 00 00 00 00 337 00 00 00 00 00 00 00 00 338 00 00 00 00 00 00 00 00 339 00 00 00 00 00 00 00 00 340 00 00 00 00 00 00 00 00 341 00 00 00 00 00 00 00 00 342 00 00 00 00 00 00 00 00 343 00 00 00 00 00 00 00 00 344 00 00 00 00 00 00 00 00 345 00 00 00 00 00 00 00 00]; 346 }; 347 samsung_8 { 348 reg = <10>; 349 u-boot,dm-pre-reloc; 350 data = [91 20 f1 03 04 12 05 0a 351 03 11 01 08 0a 00 50 01 352 78 78 90 50 90 11 50 e0 353 10 04 3c 3c 01 90 00 00 354 00 80 00 00 00 00 00 a8 355 00 00 00 00 00 00 00 00 356 00 00 00 00 00 00 00 00 357 00 00 00 00 0f 11 02 00 358 00 00 00 00 00 00 00 00 359 00 00 00 00 00 00 00 00 360 00 00 00 00 00 00 00 00 361 00 00 00 00 00 00 00 00 362 00 00 00 00 00 00 00 00 363 00 00 00 00 00 00 00 00 364 00 00 00 00 00 80 ce 01 365 00 00 55 00 00 00 00 00 366 4b 34 45 36 45 33 30 34 367 45 44 2d 45 47 43 45 20 368 20 20 00 00 80 ce 00 00 369 00 00 00 00 00 00 00 00 370 00 00 00 00 00 00 00 00 371 00 00 00 00 00 00 00 00 372 00 00 00 00 00 00 00 00 373 00 00 00 00 00 00 00 00 374 00 00 00 00 00 00 00 00 375 00 00 00 00 00 00 00 00 376 00 00 00 00 00 00 00 00 377 00 00 00 00 00 00 00 00 378 00 00 00 00 00 00 00 00 379 00 00 00 00 00 00 00 00 380 00 00 00 00 00 00 00 00 381 00 00 00 00 00 00 00 00]; 382 }; 383 hynix-h9ccnnnbltmlar-ntm-lpddr3-16 { 384 /* 385 * banks 8, ranks 2, rows 14, 386 * columns 11, density 4096 mb, x16 387 */ 388 reg = <12>; 389 u-boot,dm-pre-reloc; 390 data = [91 20 f1 03 04 12 05 0a 391 03 11 01 08 0a 00 50 01 392 78 78 90 50 90 11 50 e0 393 10 04 3c 3c 01 90 00 00 394 00 80 00 00 00 00 00 a8 395 00 00 00 00 00 00 00 00 396 00 00 00 00 00 00 00 00 397 00 00 00 00 0f 01 02 00 398 00 00 00 00 00 00 00 00 399 00 00 00 00 00 00 00 00 400 00 00 00 00 00 00 00 00 401 00 00 00 00 00 00 00 00 402 00 00 00 00 00 00 00 00 403 00 00 00 00 00 00 00 00 404 00 00 00 00 00 80 ad 00 405 00 00 55 00 00 00 00 00 406 48 39 43 43 4e 4e 4e 42 407 4c 54 4d 4c 41 52 2d 4e 408 54 4d 00 00 80 ad 00 00 409 00 00 00 00 00 00 00 00 410 00 00 00 00 00 00 00 00 411 00 00 00 00 00 00 00 00 412 00 00 00 00 00 00 00 00 413 00 00 00 00 00 00 00 00 414 00 00 00 00 00 00 00 00 415 00 00 00 00 00 00 00 00 416 00 00 00 00 00 00 00 00 417 00 00 00 00 00 00 00 00 418 00 00 00 00 00 00 00 00 419 00 00 00 00 00 00 00 00 420 00 00 00 00 00 00 00 00 421 00 00 00 00 00 00 00 00]; 422 }; 423 hynix-h9ccnnncltmlar-lpddr3 { 424 /* 425 * banks 8, ranks 2, rows 15, 426 * columns 11, density 8192 mb, x16 427 */ 428 reg = <13>; 429 u-boot,dm-pre-reloc; 430 data = [91 20 f1 03 05 1a 05 0a 431 03 11 01 08 0a 00 50 01 432 78 78 90 50 90 11 50 e0 433 90 06 3c 3c 01 90 00 00 434 00 80 00 00 00 00 00 a8 435 00 00 00 00 00 00 00 00 436 00 00 00 00 00 00 00 00 437 00 00 00 00 0f 01 02 00 438 00 00 00 00 00 00 00 00 439 00 00 00 00 00 00 00 00 440 00 00 00 00 00 00 00 00 441 00 00 00 00 00 00 00 00 442 00 00 00 00 00 00 00 00 443 00 00 00 00 00 00 00 00 444 00 00 00 00 00 80 ad 00 445 00 00 55 00 00 00 00 00 446 48 39 43 43 4e 4e 4e 43 447 4c 54 4d 4c 41 52 00 00 448 00 00 00 00 80 ad 00 00 449 00 00 00 00 00 00 00 00 450 00 00 00 00 00 00 00 00 451 00 00 00 00 00 00 00 00 452 00 00 00 00 00 00 00 00 453 00 00 00 00 00 00 00 00 454 00 00 00 00 00 00 00 00 455 00 00 00 00 00 00 00 00 456 00 00 00 00 00 00 00 00 457 00 00 00 00 00 00 00 00 458 00 00 00 00 00 00 00 00 459 00 00 00 00 00 00 00 00 460 00 00 00 00 00 00 00 00 461 00 00 00 00 00 00 00 00]; 462 }; 463 elpida-edfb232a1ma { 464 /* 465 * banks 8, ranks 2, rows 15, 466 * columns 11, density 8192 mb, x16 467 */ 468 reg = <15>; 469 u-boot,dm-pre-reloc; 470 data = [91 20 f1 03 05 1a 05 0a 471 03 11 01 08 0a 00 50 01 472 78 78 90 50 90 11 50 e0 473 90 06 3c 3c 01 90 00 00 474 00 80 00 00 00 00 00 a8 475 00 00 00 00 00 00 00 00 476 00 00 00 00 00 00 00 00 477 00 00 00 00 0f 01 02 00 478 00 00 00 00 00 00 00 00 479 00 00 00 00 00 00 00 00 480 00 00 00 00 00 00 00 00 481 00 00 00 00 00 00 00 00 482 00 00 00 00 00 00 00 00 483 00 00 00 00 00 00 00 00 484 00 00 00 00 00 02 fe 00 485 00 00 00 00 00 00 00 00 486 45 44 46 42 32 33 32 41 487 31 4d 41 2d 47 44 2d 46 488 00 00 00 00 02 fe 00 00 489 00 00 00 00 00 00 00 00 490 00 00 00 00 00 00 00 00 491 00 00 00 00 00 00 00 00 492 00 00 00 00 00 00 00 00 493 00 00 00 00 00 00 00 00 494 00 00 00 00 00 00 00 00 495 00 00 00 00 00 00 00 00 496 00 00 00 00 00 00 00 00 497 00 00 00 00 00 00 00 00 498 00 00 00 00 00 00 00 00 499 00 00 00 00 00 00 00 00 500 00 00 00 00 00 00 00 00 501 00 00 00 00 00 00 00 00]; 502 }; 503 }; 504 }; 505 506 gma@2,0 { 507 reg = <0x00001000 0 0 0 0>; 508 compatible = "intel,broadwell-igd"; 509 intel,dp-hotplug = <6 6 6>; 510 intel,port-select = <1>; /* eDP */ 511 intel,power-cycle-delay = <6>; 512 intel,power-up-delay = <2000>; 513 intel,power-down-delay = <500>; 514 intel,power-backlight-on-delay = <2000>; 515 intel,power-backlight-off-delay = <2000>; 516 intel,cpu-backlight = <0x00000200>; 517 intel,pch-backlight = <0x04000200>; 518 intel,pre-graphics-delay = <200>; 519 }; 520 521 adsp@13,0 { 522 reg = <0x00009800 0 0 0 0>; 523 compatible = "intel,wildcatpoint-adsp"; 524 intel,adsp-d3-pg-enable = <0>; 525 intel,adsp-sram-pg-enable = <0>; 526 intel,sio-acpi-mode; 527 #address-cells = <1>; 528 #size-cells = <0>; 529 530 i2s: shim { 531 compatible = "intel,broadwell-i2s"; 532 #sound-dai-cells = <1>; 533 reg = <0xfb000 0xfc000 0xfd000>; 534 }; 535 }; 536 537 usb_1: usb@14,0 { 538 reg = <0x0000a000 0 0 0 0>; 539 compatible = "xhci-pci"; 540 }; 541 542 i2c0: i2c@15,1 { 543 reg = <0x0000a900 0 0 0 0>; 544 compatible = "snps,designware-i2c"; 545 #address-cells = <1>; 546 #size-cells = <0>; 547 548 rt5677: rt5677@2c { 549 compatible = "realtek,rt5677"; 550 #sound-dai-cells = <1>; 551 reg = <0x2c>; 552 }; 553 }; 554 555 me@16,0 { 556 reg = <0x0000b000 0 0 0 0>; 557 compatible = "intel,me"; 558 u-boot,dm-pre-reloc; 559 }; 560 561 usb_0: usb@1d,0 { 562 status = "disabled"; 563 reg = <0x0000e800 0 0 0 0>; 564 compatible = "ehci-pci"; 565 }; 566 567 pch: pch@1f,0 { 568 reg = <0x0000f800 0 0 0 0>; 569 compatible = "intel,broadwell-pch"; 570 u-boot,dm-pre-reloc; 571 #address-cells = <1>; 572 #size-cells = <1>; 573 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 574 0x80 0x80 0x80 0x80>; 575 intel,gpi-routing = <0 0 0 0 0 0 0 2 576 1 0 0 0 0 0 0 0>; 577 /* Enable EC SMI source */ 578 intel,alt-gp-smi-enable = <0x0040>; 579 580 /* EC-SCI is GPIO36 */ 581 intel,gpe0-en = <0 0x10 0 0>; 582 583 power-enable-gpio = <&gpio_a 23 0>; 584 585 spi: spi { 586 u-boot,dm-pre-reloc; 587 #address-cells = <1>; 588 #size-cells = <0>; 589 compatible = "intel,ich9-spi"; 590 fwstore_spi: spi-flash@0 { 591 u-boot,dm-pre-reloc; 592 #size-cells = <1>; 593 #address-cells = <1>; 594 reg = <0>; 595 compatible = "winbond,w25q64", 596 "jedec,spi-nor"; 597 memory-map = <0xff800000 0x00800000>; 598 rw-mrc-cache { 599 u-boot,dm-pre-reloc; 600 label = "rw-mrc-cache"; 601 reg = <0x003e0000 0x00010000>; 602 }; 603 }; 604 }; 605 606 gpio_a: gpioa { 607 compatible = "intel,broadwell-gpio"; 608 u-boot,dm-pre-reloc; 609 #gpio-cells = <2>; 610 gpio-controller; 611 reg = <0 0>; 612 bank-name = "A"; 613 }; 614 615 gpio_b: gpiob { 616 compatible = "intel,broadwell-gpio"; 617 u-boot,dm-pre-reloc; 618 #gpio-cells = <2>; 619 gpio-controller; 620 reg = <1 0>; 621 bank-name = "B"; 622 }; 623 624 gpio_c: gpioc { 625 compatible = "intel,broadwell-gpio"; 626 u-boot,dm-pre-reloc; 627 #gpio-cells = <2>; 628 gpio-controller; 629 reg = <2 0>; 630 bank-name = "C"; 631 }; 632 633 lpc { 634 compatible = "intel,broadwell-lpc"; 635 #address-cells = <1>; 636 #size-cells = <0>; 637 u-boot,dm-pre-reloc; 638 intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 639 cros_ec: cros-ec { 640 u-boot,dm-pre-reloc; 641 compatible = "google,cros-ec-lpc"; 642 reg = <0x204 1 0x200 1 0x880 0x80>; 643 644 /* 645 * Describes the flash memory within 646 * the EC 647 */ 648 #address-cells = <1>; 649 #size-cells = <1>; 650 flash@8000000 { 651 reg = <0x08000000 0x20000>; 652 erase-value = <0xff>; 653 }; 654 }; 655 }; 656 }; 657 658 sata@1f,2 { 659 compatible = "intel,wildcatpoint-ahci"; 660 reg = <0x0000fa00 0 0 0 0>; 661 u-boot,dm-pre-proper; 662 intel,sata-mode = "ahci"; 663 intel,sata-port-map = <1>; 664 intel,sata-port0-gen3-tx = <0x72>; 665 reset-gpio = <&gpio_b 15 GPIO_ACTIVE_LOW>; 666 }; 667 668 smbus: smbus@1f,3 { 669 compatible = "intel,ich-i2c"; 670 reg = <0x0000fb00 0 0 0 0>; 671 u-boot,dm-pre-reloc; 672 }; 673 }; 674 675 tpm { 676 u-boot,dm-pre-reloc; 677 reg = <0xfed40000 0x5000>; 678 compatible = "infineon,slb9635lpc"; 679 secdata { 680 u-boot,dm-pre-reloc; 681 compatible = "google,tpm-secdata"; 682 }; 683 }; 684 685 microcode { 686 u-boot,dm-pre-reloc; 687 update@0 { 688 u-boot,dm-pre-reloc; 689#include "microcode/mc0306d4_00000018.dtsi" 690 }; 691 }; 692 693 sound { 694 compatible = "google,samus-sound"; 695 codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>; 696 cpu { 697 sound-dai = <&i2s 0>; 698 }; 699 700 codec { 701 sound-dai = <&rt5677 0>; 702 }; 703 }; 704 705}; 706 707&rtc { 708 #address-cells = <1>; 709 #size-cells = <0>; 710 nvdata { 711 u-boot,dm-pre-reloc; 712 compatible = "google,cmos-nvdata"; 713 reg = <0x26>; 714 }; 715}; 716