1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2017-2018 NXP
4 * Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com>
5 */
6
7 #include <common.h>
8 #include <errno.h>
9 #include <linux/libfdt.h>
10 #include <asm/io.h>
11 #include <asm/gpio.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sci/sci.h>
14 #include <asm/arch/imx8-pins.h>
15 #include <asm/arch/iomux.h>
16 #include <asm/arch/sys_proto.h>
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
21 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
22 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
23 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
24
25 static iomux_cfg_t uart0_pads[] = {
26 SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
27 SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
28 };
29
setup_iomux_uart(void)30 static void setup_iomux_uart(void)
31 {
32 imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
33 }
34
board_early_init_f(void)35 int board_early_init_f(void)
36 {
37 sc_pm_clock_rate_t rate = SC_80MHZ;
38 int ret;
39
40 /* Set UART0 clock root to 80 MHz */
41 ret = sc_pm_setup_uart(SC_R_UART_0, rate);
42 if (ret)
43 return ret;
44
45 setup_iomux_uart();
46
47 /* This is needed to because Kernel do not Power Up DC_0 */
48 sc_pm_set_resource_power_mode(-1, SC_R_DC_0, SC_PM_PW_MODE_ON);
49 sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
50
51 return 0;
52 }
53
54 #if IS_ENABLED(CONFIG_FEC_MXC)
55 #include <miiphy.h>
56
board_phy_config(struct phy_device * phydev)57 int board_phy_config(struct phy_device *phydev)
58 {
59 #ifdef CONFIG_FEC_ENABLE_MAX7322
60 u8 value;
61
62 /* This is needed to drive the pads to 1.8V instead of 1.5V */
63 i2c_set_bus_num(CONFIG_MAX7322_I2C_BUS);
64
65 if (!i2c_probe(CONFIG_MAX7322_I2C_ADDR)) {
66 /* Write 0x1 to enable O0 output, this device has no addr */
67 /* hence addr length is 0 */
68 value = 0x1;
69 if (dm_i2c_write(CONFIG_MAX7322_I2C_ADDR, 0, 0, &value, 1))
70 printf("MAX7322 write failed\n");
71 } else {
72 printf("MAX7322 Not found\n");
73 }
74 mdelay(1);
75 #endif
76
77 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
78 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
79
80 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
81 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
82 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
83 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
84
85 if (phydev->drv->config)
86 phydev->drv->config(phydev);
87
88 return 0;
89 }
90 #endif
91
checkboard(void)92 int checkboard(void)
93 {
94 puts("Board: ROM-7720-A1 4GB\n");
95
96 build_info();
97 print_bootinfo();
98
99 return 0;
100 }
101
board_init(void)102 int board_init(void)
103 {
104 /* Power up base board */
105 sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
106
107 return 0;
108 }
109
detail_board_ddr_info(void)110 void detail_board_ddr_info(void)
111 {
112 puts("\nDDR ");
113 }
114
115 /*
116 * Board specific reset that is system reset.
117 */
reset_cpu(ulong addr)118 void reset_cpu(ulong addr)
119 {
120 /* TODO */
121 }
122
board_mmc_get_env_dev(int devno)123 int board_mmc_get_env_dev(int devno)
124 {
125 return devno;
126 }
127
board_late_init(void)128 int board_late_init(void)
129 {
130 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
131 env_set("board_name", "ROM-7720-A1");
132 env_set("board_rev", "iMX8QM");
133 #endif
134
135 env_set("sec_boot", "no");
136 #ifdef CONFIG_AHAB_BOOT
137 env_set("sec_boot", "yes");
138 #endif
139
140 return 0;
141 }
142