1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2014 Freescale Semiconductor, Inc.
4 */
5
6 #include <common.h>
7 #include <command.h>
8 #include <env.h>
9 #include <i2c.h>
10 #include <init.h>
11 #include <netdev.h>
12 #include <linux/compiler.h>
13 #include <asm/mmu.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 #include <asm/immap_85xx.h>
17 #include <asm/fsl_law.h>
18 #include <asm/fsl_serdes.h>
19 #include <asm/fsl_liodn.h>
20 #include <fm_eth.h>
21
22 #include "t4rdb.h"
23 #include "cpld.h"
24 #include "../common/vid.h"
25
26 DECLARE_GLOBAL_DATA_PTR;
27
checkboard(void)28 int checkboard(void)
29 {
30 struct cpu_type *cpu = gd->arch.cpu;
31 u8 sw;
32
33 printf("Board: %sRDB, ", cpu->name);
34 printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ",
35 CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver));
36
37 sw = CPLD_READ(vbank);
38 sw = sw & CPLD_BANK_SEL_MASK;
39
40 if (sw <= 7)
41 printf("vBank: %d\n", sw);
42 else
43 printf("Unsupported Bank=%x\n", sw);
44
45 puts("SERDES Reference Clocks:\n");
46 printf(" SERDES1=100MHz SERDES2=156.25MHz\n"
47 " SERDES3=100MHz SERDES4=100MHz\n");
48
49 return 0;
50 }
51
board_early_init_r(void)52 int board_early_init_r(void)
53 {
54 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
55 int flash_esel = find_tlb_idx((void *)flashbase, 1);
56
57 /*
58 * Remap Boot flash + PROMJET region to caching-inhibited
59 * so that flash can be erased properly.
60 */
61
62 /* Flush d-cache and invalidate i-cache of any FLASH data */
63 flush_dcache();
64 invalidate_icache();
65
66 if (flash_esel == -1) {
67 /* very unlikely unless something is messed up */
68 puts("Error: Could not find TLB for FLASH BASE\n");
69 flash_esel = 2; /* give our best effort to continue */
70 } else {
71 /* invalidate existing TLB entry for flash + promjet */
72 disable_tlb(flash_esel);
73 }
74
75 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
76 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
77 0, flash_esel, BOOKE_PAGESZ_256M, 1);
78
79 /*
80 * Adjust core voltage according to voltage ID
81 * This function changes I2C mux to channel 2.
82 */
83 if (adjust_vdd(0))
84 printf("Warning: Adjusting core voltage failed.\n");
85
86 return 0;
87 }
88
misc_init_r(void)89 int misc_init_r(void)
90 {
91 return 0;
92 }
93
ft_board_setup(void * blob,bd_t * bd)94 int ft_board_setup(void *blob, bd_t *bd)
95 {
96 phys_addr_t base;
97 phys_size_t size;
98
99 ft_cpu_setup(blob, bd);
100
101 base = env_get_bootm_low();
102 size = env_get_bootm_size();
103
104 fdt_fixup_memory(blob, (u64)base, (u64)size);
105
106 #ifdef CONFIG_PCI
107 pci_of_setup(blob, bd);
108 #endif
109
110 fdt_fixup_liodn(blob);
111 fsl_fdt_fixup_dr_usb(blob, bd);
112
113 #ifdef CONFIG_SYS_DPAA_FMAN
114 fdt_fixup_fman_ethernet(blob);
115 fdt_fixup_board_enet(blob);
116 #endif
117
118 return 0;
119 }
120
121 /*
122 * This function is called by bdinfo to print detail board information.
123 * As an exmaple for future board, we organize the messages into
124 * several sections. If applicable, the message is in the format of
125 * <name> = <value>
126 * It should aligned with normal output of bdinfo command.
127 *
128 * Voltage: Core, DDR and another configurable voltages
129 * Clock : Critical clocks which are not printed already
130 * RCW : RCW source if not printed already
131 * Misc : Other important information not in above catagories
132 */
board_detail(void)133 void board_detail(void)
134 {
135 int rcwsrc;
136
137 /* RCW section SW3[4] */
138 rcwsrc = 0x0;
139 puts("RCW source = ");
140 switch (rcwsrc & 0x1) {
141 case 0x1:
142 puts("SDHC/eMMC\n");
143 break;
144 default:
145 puts("I2C normal addressing\n");
146 break;
147 }
148 }
149