1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2017 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <asm/io.h>
10 #include <asm/arch/clock.h>
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/mx6-pins.h>
14 #include <asm/arch/mx6-ddr.h>
15 #include <asm/arch/sys_proto.h>
16 #include <env.h>
17 #include <errno.h>
18 #include <asm/gpio.h>
19 #include <malloc.h>
20 #include <asm/mach-imx/iomux-v3.h>
21 #include <asm/mach-imx/boot_mode.h>
22 #include <miiphy.h>
23 #include <netdev.h>
24 #include <i2c.h>
25
26 #include <dm.h>
27 #include <dm/platform_data/serial_mxc.h>
28 #include <dm/platdata.h>
29
30 #include "common.h"
31
32 DECLARE_GLOBAL_DATA_PTR;
33
34 static bool hw_ids_valid;
35 static bool sw_ids_valid;
36 static u32 cpu_id;
37 static u32 unit_id;
38
39 const char *gpio_table_sw_names[] = {
40 "GPIO2_4", "GPIO2_5", "GPIO2_6", "GPIO2_7"
41 };
42
43 const char *gpio_table_sw_ids_names[] = {
44 "sw0", "sw1", "sw2", "sw3"
45 };
46
47 const char *gpio_table_hw_names[] = {
48 "GPIO6_7", "GPIO6_9", "GPIO6_10", "GPIO6_11",
49 "GPIO4_7", "GPIO4_11", "GPIO4_13", "GPIO4_15"
50 };
51
52 const char *gpio_table_hw_ids_names[] = {
53 "hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7"
54 };
55
get_board_id(const char ** pin_names,const char ** ids_names,int size,bool * valid,u32 * id)56 static int get_board_id(const char **pin_names, const char **ids_names,
57 int size, bool *valid, u32 *id)
58 {
59 struct gpio_desc desc;
60 int i, ret, val;
61
62 *valid = false;
63
64 for (i = 0; i < size; i++) {
65 memset(&desc, 0, sizeof(desc));
66
67 ret = dm_gpio_lookup_name(pin_names[i], &desc);
68 if (ret) {
69 printf("Can't lookup request SWx gpios\n");
70 return ret;
71 }
72
73 ret = dm_gpio_request(&desc, ids_names[i]);
74 if (ret) {
75 printf("Can't lookup request SWx gpios\n");
76 return ret;
77 }
78
79 dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN);
80
81 val = dm_gpio_get_value(&desc);
82 if (val < 0) {
83 printf("Can't get SW%d ID\n", i);
84 *id = 0;
85 return val;
86 }
87 *id |= val << i;
88 }
89 *valid = true;
90
91 return 0;
92 }
93
dram_init(void)94 int dram_init(void)
95 {
96 gd->ram_size = imx_ddr_size();
97
98 return 0;
99 }
100
101 iomux_v3_cfg_t const misc_pads[] = {
102 /* Prod ID GPIO pins */
103 MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
104 MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
105 MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
106 MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
107
108 /* HW revision GPIO pins */
109 MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
110 MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
111 MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
112 MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
113 MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
114 MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
115 MX6_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
116 MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
117
118 /* XTALOSC */
119 MX6_PAD_GPIO_3__XTALOSC_REF_CLK_24M | MUX_PAD_CTRL(NO_PAD_CTRL),
120
121 /* Emergency recovery pin */
122 MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
123 };
124
125 /*
126 * Do not overwrite the console
127 * Always use serial for U-Boot console
128 */
overwrite_console(void)129 int overwrite_console(void)
130 {
131 return 1;
132 }
133
134 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,bd_t * bd)135 int ft_board_setup(void *blob, bd_t *bd)
136 {
137 fdt_fixup_ethernet(blob);
138 return 0;
139 }
140 #endif
141
board_phy_config(struct phy_device * phydev)142 int board_phy_config(struct phy_device *phydev)
143 {
144 /* display5 due to PCB routing can only work with 100 Mbps */
145 phydev->advertising &= ~(ADVERTISED_1000baseX_Half |
146 ADVERTISED_1000baseX_Full |
147 SUPPORTED_1000baseT_Half |
148 SUPPORTED_1000baseT_Full);
149
150 if (phydev->drv->config)
151 return phydev->drv->config(phydev);
152
153 return 0;
154 }
155
board_init(void)156 int board_init(void)
157 {
158 struct gpio_desc phy_int_gbe, spi2_wp;
159 int ret;
160
161 debug("board init\n");
162 /* address of boot parameters */
163 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
164
165 /* Setup misc (application specific) stuff */
166 SETUP_IOMUX_PADS(misc_pads);
167
168 get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0],
169 ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id);
170 debug("SWx unit_id 0x%x\n", unit_id);
171
172 get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0],
173 ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id);
174 debug("HWx cpu_id 0x%x\n", cpu_id);
175
176 if (hw_ids_valid && sw_ids_valid)
177 printf("ID: unit type 0x%x rev 0x%x\n", unit_id, cpu_id);
178
179 udelay(25);
180
181 /* Setup low level FEC (ETH) */
182 ret = dm_gpio_lookup_name("GPIO1_28", &phy_int_gbe);
183 if (ret) {
184 printf("Cannot get GPIO1_28\n");
185 } else {
186 ret = dm_gpio_request(&phy_int_gbe, "INT_GBE");
187 if (!ret)
188 dm_gpio_set_dir_flags(&phy_int_gbe, GPIOD_IS_IN);
189 }
190
191 iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO);
192 enable_fec_anatop_clock(0, ENET_125MHZ);
193
194 /* Setup #WP for SPI-NOR memory */
195 ret = dm_gpio_lookup_name("GPIO7_0", &spi2_wp);
196 if (ret) {
197 printf("Cannot get GPIO7_0\n");
198 } else {
199 ret = dm_gpio_request(&spi2_wp, "spi2_#wp");
200 if (!ret)
201 dm_gpio_set_dir_flags(&spi2_wp, GPIOD_IS_OUT |
202 GPIOD_IS_OUT_ACTIVE);
203 }
204
205 return 0;
206 }
207
208 #ifdef CONFIG_CMD_BMODE
209 static const struct boot_mode board_boot_modes[] = {
210 /* eMMC, USDHC-4, 8-bit bus width */
211 /* SPI-NOR, ECSPI-2 SS0, 3-bytes addressing */
212 {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
213 {"spinor", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x09)},
214 {NULL, 0},
215 };
216
setup_boot_modes(void)217 static void setup_boot_modes(void)
218 {
219 add_board_boot_modes(board_boot_modes);
220 }
221 #else
setup_boot_modes(void)222 static inline void setup_boot_modes(void) {}
223 #endif
224
misc_init_r(void)225 int misc_init_r(void)
226 {
227 struct gpio_desc em_pad;
228 int ret;
229
230 setup_boot_modes();
231
232 ret = dm_gpio_lookup_name("GPIO3_29", &em_pad);
233 if (ret) {
234 printf("Can't find emergency PAD gpio\n");
235 return ret;
236 }
237
238 ret = dm_gpio_request(&em_pad, "Emergency_PAD");
239 if (ret) {
240 printf("Can't request emergency PAD gpio\n");
241 return ret;
242 }
243
244 dm_gpio_set_dir_flags(&em_pad, GPIOD_IS_IN);
245
246 return 0;
247 }
248