1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2013 Freescale Semiconductor, Inc.
4 * Copyright (C) 2015 ECA Sinters
5 *
6 * Author: Fabio Estevam <fabio.estevam@freescale.com>
7 * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
8 */
9
10 #include <asm/arch/clock.h>
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/mx6-pins.h>
14 #include <linux/errno.h>
15 #include <asm/gpio.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/boot_mode.h>
18 #include <malloc.h>
19 #include <mmc.h>
20 #include <fsl_esdhc_imx.h>
21 #include <miiphy.h>
22 #include <netdev.h>
23 #include <asm/arch/mxc_hdmi.h>
24 #include <asm/arch/crm_regs.h>
25 #include <linux/fb.h>
26 #include <ipu_pixfmt.h>
27 #include <asm/io.h>
28 #include <asm/arch/sys_proto.h>
29 #include <asm/mach-imx/mxc_i2c.h>
30 #include <i2c.h>
31
32 #include "../common/mx6.h"
33
34 DECLARE_GLOBAL_DATA_PTR;
35
dram_init(void)36 int dram_init(void)
37 {
38 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
39
40 return 0;
41 }
42
board_early_init_f(void)43 int board_early_init_f(void)
44 {
45 seco_mx6_setup_uart_iomux();
46
47 return 0;
48 }
49
board_phy_config(struct phy_device * phydev)50 int board_phy_config(struct phy_device *phydev)
51 {
52 seco_mx6_rgmii_rework(phydev);
53 if (phydev->drv->config)
54 phydev->drv->config(phydev);
55
56 return 0;
57 }
58
board_eth_init(bd_t * bis)59 int board_eth_init(bd_t *bis)
60 {
61 uint32_t base = IMX_FEC_BASE;
62 struct mii_dev *bus = NULL;
63 struct phy_device *phydev = NULL;
64 int ret = 0;
65
66 seco_mx6_setup_enet_iomux();
67
68 #ifdef CONFIG_FEC_MXC
69 bus = fec_get_miibus(base, -1);
70 if (!bus)
71 return -ENOMEM;
72
73 /* scan phy 4,5,6,7 */
74 phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
75 if (!phydev) {
76 free(bus);
77 return -ENOMEM;
78 }
79
80 printf("using phy at %d\n", phydev->addr);
81 ret = fec_probe(bis, -1, base, bus, phydev);
82 if (ret) {
83 free(phydev);
84 free(bus);
85 printf("FEC MXC: %s:failed\n", __func__);
86 }
87 #endif
88
89 return ret;
90 }
91
92 #define USDHC4_CD_GPIO IMX_GPIO_NR(2, 6)
93
94 static struct fsl_esdhc_cfg usdhc_cfg[2] = {
95 {USDHC3_BASE_ADDR, 0, 4},
96 {USDHC4_BASE_ADDR, 0, 4},
97 };
98
board_mmc_getcd(struct mmc * mmc)99 int board_mmc_getcd(struct mmc *mmc)
100 {
101 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
102 int ret = 0;
103
104 switch (cfg->esdhc_base) {
105 case USDHC3_BASE_ADDR:
106 ret = 1; /* Assume eMMC is always present */
107 break;
108 case USDHC4_BASE_ADDR:
109 ret = !gpio_get_value(USDHC4_CD_GPIO);
110 break;
111 }
112
113 return ret;
114 }
115
board_mmc_init(bd_t * bis)116 int board_mmc_init(bd_t *bis)
117 {
118 u32 index = 0;
119 int ret;
120
121 /*
122 * Following map is done:
123 * (U-Boot device node) (Physical Port)
124 * mmc0 eMMC on Board
125 * mmc1 Ext SD
126 */
127 for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
128 switch (index) {
129 case 0:
130 seco_mx6_setup_usdhc_iomux(3);
131 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
132 break;
133 case 1:
134 seco_mx6_setup_usdhc_iomux(4);
135 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
136 break;
137
138 default:
139 printf("Warning: %d exceed maximum number of SD ports %d\n",
140 index + 1, CONFIG_SYS_FSL_USDHC_NUM);
141 return -EINVAL;
142 }
143
144 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
145 if (ret)
146 return ret;
147 }
148
149 return 0;
150 }
151
board_init(void)152 int board_init(void)
153 {
154 /* address of boot parameters */
155 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
156
157 imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 |
158 MUX_PAD_CTRL(NO_PAD_CTRL));
159
160 gpio_direction_output(IMX_GPIO_NR(2, 4), 0);
161
162 /* Set Low */
163 gpio_set_value(IMX_GPIO_NR(2, 4), 0);
164 udelay(1000);
165
166 /* Set High */
167 gpio_set_value(IMX_GPIO_NR(2, 4), 1);
168
169 return 0;
170 }
171
checkboard(void)172 int checkboard(void)
173 {
174 puts("Board: SECO uQ7\n");
175
176 return 0;
177 }
178