1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2008
4 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
5 *
6 * Copyright 2004 Freescale Semiconductor.
7 * (C) Copyright 2002,2003, Motorola Inc.
8 * Xianghua Xiao, (X.Xiao@motorola.com)
9 *
10 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
11 */
12
13 #include <common.h>
14 #include <env.h>
15 #include <pci.h>
16 #include <asm/processor.h>
17 #include <asm/immap_85xx.h>
18 #include <ioports.h>
19 #include <flash.h>
20 #include <linux/libfdt.h>
21 #include <fdt_support.h>
22 #include <asm/io.h>
23 #include <i2c.h>
24 #include <mb862xx.h>
25 #include <video_fb.h>
26 #include "upm_table.h"
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 extern flash_info_t flash_info[]; /* FLASH chips info */
31 extern GraphicDevice mb862xx;
32
33 void local_bus_init (void);
34 ulong flash_get_size (ulong base, int banknum);
35
checkboard(void)36 int checkboard (void)
37 {
38 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
39 char buf[64];
40 int f;
41 int i = env_get_f("serial#", buf, sizeof(buf));
42 #ifdef CONFIG_PCI
43 char *src;
44 #endif
45
46 puts("Board: Socrates");
47 if (i > 0) {
48 puts(", serial# ");
49 puts(buf);
50 }
51 putc('\n');
52
53 #if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
54 /* Check the PCI_clk sel bit */
55 if (in_be32(&gur->porpllsr) & (1<<15)) {
56 src = "SYSCLK";
57 f = CONFIG_SYS_CLK_FREQ;
58 } else {
59 src = "PCI_CLK";
60 f = CONFIG_PCI_CLK_FREQ;
61 }
62 printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
63 #else
64 printf ("PCI1: disabled\n");
65 #endif
66
67 /*
68 * Initialize local bus.
69 */
70 local_bus_init ();
71 return 0;
72 }
73
misc_init_r(void)74 int misc_init_r (void)
75 {
76 /*
77 * Adjust flash start and offset to detected values
78 */
79 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
80 gd->bd->bi_flashoffset = 0;
81
82 /*
83 * Check if boot FLASH isn't max size
84 */
85 if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
86 set_lbc_or(0, gd->bd->bi_flashstart |
87 (CONFIG_SYS_OR0_PRELIM & 0x00007fff));
88 set_lbc_br(0, gd->bd->bi_flashstart |
89 (CONFIG_SYS_BR0_PRELIM & 0x00007fff));
90
91 /*
92 * Re-check to get correct base address
93 */
94 flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
95 }
96
97 /*
98 * Check if only one FLASH bank is available
99 */
100 if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
101 set_lbc_or(1, 0);
102 set_lbc_br(1, 0);
103
104 /*
105 * Re-do flash protection upon new addresses
106 */
107 flash_protect (FLAG_PROTECT_CLEAR,
108 gd->bd->bi_flashstart, 0xffffffff,
109 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
110
111 /* Monitor protection ON by default */
112 flash_protect (FLAG_PROTECT_SET,
113 CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
114 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
115
116 /* Environment protection ON by default */
117 flash_protect (FLAG_PROTECT_SET,
118 CONFIG_ENV_ADDR,
119 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
120 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
121
122 /* Redundant environment protection ON by default */
123 flash_protect (FLAG_PROTECT_SET,
124 CONFIG_ENV_ADDR_REDUND,
125 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
126 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
127 }
128
129 #if defined(CONFIG_DM_PCI)
130 pci_init();
131 #endif
132
133 return 0;
134 }
135
136 /*
137 * Initialize Local Bus
138 */
local_bus_init(void)139 void local_bus_init (void)
140 {
141 volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
142 volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
143 sys_info_t sysinfo;
144 uint clkdiv;
145 uint lbc_mhz;
146 uint lcrr = CONFIG_SYS_LBC_LCRR;
147
148 get_sys_info (&sysinfo);
149 clkdiv = lbc->lcrr & LCRR_CLKDIV;
150 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
151
152 /* Disable PLL bypass for Local Bus Clock >= 66 MHz */
153 if (lbc_mhz >= 66)
154 lcrr &= ~LCRR_DBYP; /* DLL Enabled */
155 else
156 lcrr |= LCRR_DBYP; /* DLL Bypass */
157
158 out_be32 (&lbc->lcrr, lcrr);
159 asm ("sync;isync;msync");
160
161 out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
162 out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
163 out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
164 out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
165
166 /* Init UPMA for FPGA access */
167 out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
168 upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int));
169
170 /* Init UPMB for Lime controller access */
171 out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
172 upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
173 }
174
175 #ifdef CONFIG_BOARD_EARLY_INIT_R
board_early_init_r(void)176 int board_early_init_r (void)
177 {
178 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
179
180 /* set and reset the GPIO pin 2 which will reset the W83782G chip */
181 out_8((unsigned char*)&gur->gpoutdr, 0x3F );
182 out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
183 udelay(200);
184 out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
185
186 return (0);
187 }
188 #endif /* CONFIG_BOARD_EARLY_INIT_R */
189
190 #ifdef CONFIG_OF_BOARD_SETUP
ft_board_setup(void * blob,bd_t * bd)191 int ft_board_setup(void *blob, bd_t *bd)
192 {
193 u32 val[12];
194 int rc, i = 0;
195
196 ft_cpu_setup(blob, bd);
197
198 /* Fixup NOR FLASH mapping */
199 val[i++] = 0; /* chip select number */
200 val[i++] = 0; /* always 0 */
201 val[i++] = gd->bd->bi_flashstart;
202 val[i++] = gd->bd->bi_flashsize;
203
204 #if defined(CONFIG_VIDEO_MB862xx)
205 if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
206 /* Fixup LIME mapping */
207 val[i++] = 2; /* chip select number */
208 val[i++] = 0; /* always 0 */
209 val[i++] = CONFIG_SYS_LIME_BASE;
210 val[i++] = CONFIG_SYS_LIME_SIZE;
211 }
212 #endif
213
214 /* Fixup FPGA mapping */
215 val[i++] = 3; /* chip select number */
216 val[i++] = 0; /* always 0 */
217 val[i++] = CONFIG_SYS_FPGA_BASE;
218 val[i++] = CONFIG_SYS_FPGA_SIZE;
219
220 rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
221 val, i * sizeof(u32), 1);
222 if (rc)
223 printf("Unable to update localbus ranges, err=%s\n",
224 fdt_strerror(rc));
225
226 return 0;
227 }
228 #endif /* CONFIG_OF_BOARD_SETUP */
229
230 #if defined(CONFIG_OF_SEPARATE)
board_fdt_blob_setup(void)231 void *board_fdt_blob_setup(void)
232 {
233 void *fw_dtb;
234
235 fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
236 if (fdt_magic(fw_dtb) != FDT_MAGIC) {
237 printf("DTB is not passed via %x\n", (u32)fw_dtb);
238 return NULL;
239 }
240
241 return fw_dtb;
242 }
243 #endif
244
get_serial_clock(void)245 int get_serial_clock(void)
246 {
247 return 333333330;
248 }
249