1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (c) 2011 Graf-Syteco, Matthias Weisser
4 * <weisserm@arcor.de>
5 *
6 * Based on tx25.c:
7 * (C) Copyright 2009 DENX Software Engineering
8 * Author: John Rigby <jrigby@gmail.com>
9 *
10 * Based on imx27lite.c:
11 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
12 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
13 * And:
14 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
15 */
16 #include <common.h>
17 #include <cpu_func.h>
18 #include <init.h>
19 #include <asm/gpio.h>
20 #include <asm/io.h>
21 #include <asm/arch/imx-regs.h>
22 #include <asm/arch/iomux-mx25.h>
23
24 DECLARE_GLOBAL_DATA_PTR;
25
board_init()26 int board_init()
27 {
28 static const iomux_v3_cfg_t sdhc1_pads[] = {
29 NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
30 NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
31 NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
32 NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
33 NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
34 NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
35 };
36
37 static const iomux_v3_cfg_t dig_out_pads[] = {
38 MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
39 MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
40 NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
41 NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
42 };
43
44 static const iomux_v3_cfg_t led_pads[] = {
45 MX25_PAD_CSI_D9__GPIO_4_21,
46 MX25_PAD_CSI_D4__GPIO_1_29,
47 };
48
49 static const iomux_v3_cfg_t can_pads[] = {
50 NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
51 NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
52 NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
53 NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
54 };
55
56 static const iomux_v3_cfg_t i2c3_pads[] = {
57 MX25_PAD_CSPI1_SS1__I2C3_DAT,
58 MX25_PAD_GPIO_E__I2C3_CLK,
59 };
60
61 icache_enable();
62
63 /* Setup of core voltage selection pin to run at 1.4V */
64 imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
65 gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
66
67 /* Setup of SD card pins*/
68 imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
69
70 /* Setup of digital output for USB power and OC */
71 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
72 gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
73
74 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
75 gpio_direction_input(IMX_GPIO_NR(1, 18));
76
77 /* Setup of digital output control pins */
78 imx_iomux_v3_setup_multiple_pads(dig_out_pads,
79 ARRAY_SIZE(dig_out_pads));
80
81 /* Switch both output drivers off */
82 gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
83 gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
84
85 /* Setup of key input pin */
86 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
87 gpio_direction_input(IMX_GPIO_NR(2, 29));
88
89 /* Setup of status LED outputs */
90 imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
91
92 /* Switch both LEDs off */
93 gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
94 gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
95
96 /* Setup of CAN1 and CAN2 signals */
97 imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
98
99 /* Setup of I2C3 signals */
100 imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
101
102 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
103
104 return 0;
105 }
106
board_late_init(void)107 int board_late_init(void)
108 {
109 const char *e;
110
111 #ifdef CONFIG_FEC_MXC
112 /*
113 * FIXME: need to revisit this
114 * The original code enabled PUE and 100-k pull-down without PKE, so the right
115 * value here is likely:
116 * 0 for no pull
117 * or:
118 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
119 */
120 #define FEC_OUT_PAD_CTRL 0
121
122 static const iomux_v3_cfg_t fec_pads[] = {
123 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
124 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
125 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
126 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
127 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
128 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
129 MX25_PAD_FEC_MDIO__FEC_MDIO,
130 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
131 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
132
133 MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
134 MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
135 };
136
137 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
138
139 /* assert PHY reset (low) */
140 gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
141
142 udelay(5000);
143
144 /* deassert PHY reset */
145 gpio_set_value(IMX_GPIO_NR(3, 16), 1);
146
147 udelay(5000);
148 #endif
149
150 e = env_get("gs_base_board");
151 if (e != NULL) {
152 if (strcmp(e, "G283") == 0) {
153 int key = gpio_get_value(IMX_GPIO_NR(2, 29));
154
155 if (key) {
156 /* Switch on both LEDs to inidcate boot mode */
157 gpio_set_value(IMX_GPIO_NR(1, 29), 0);
158 gpio_set_value(IMX_GPIO_NR(4, 21), 0);
159
160 env_set("preboot", "run gs_slow_boot");
161 } else
162 env_set("preboot", "run gs_fast_boot");
163 }
164 }
165
166 return 0;
167 }
168
dram_init(void)169 int dram_init(void)
170 {
171 /* dram_init must store complete ramsize in gd->ram_size */
172 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
173 PHYS_SDRAM_SIZE);
174 return 0;
175 }
176