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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4  * (C) Copyright 2013 - 2018 Xilinx, Inc.
5  */
6 
7 #include <common.h>
8 #include <init.h>
9 #include <dm/uclass.h>
10 #include <env.h>
11 #include <fdtdec.h>
12 #include <fpga.h>
13 #include <malloc.h>
14 #include <mmc.h>
15 #include <watchdog.h>
16 #include <wdt.h>
17 #include <zynqpl.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/arch/sys_proto.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
board_init(void)23 int board_init(void)
24 {
25 	return 0;
26 }
27 
board_late_init(void)28 int board_late_init(void)
29 {
30 	int env_targets_len = 0;
31 	const char *mode;
32 	char *new_targets;
33 	char *env_targets;
34 
35 	switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
36 	case ZYNQ_BM_QSPI:
37 		mode = "qspi";
38 		env_set("modeboot", "qspiboot");
39 		break;
40 	case ZYNQ_BM_NAND:
41 		mode = "nand";
42 		env_set("modeboot", "nandboot");
43 		break;
44 	case ZYNQ_BM_NOR:
45 		mode = "nor";
46 		env_set("modeboot", "norboot");
47 		break;
48 	case ZYNQ_BM_SD:
49 		mode = "mmc0";
50 		env_set("modeboot", "sdboot");
51 		break;
52 	case ZYNQ_BM_JTAG:
53 		mode = "pxe dhcp";
54 		env_set("modeboot", "jtagboot");
55 		break;
56 	default:
57 		mode = "";
58 		env_set("modeboot", "");
59 		break;
60 	}
61 
62 	/*
63 	 * One terminating char + one byte for space between mode
64 	 * and default boot_targets
65 	 */
66 	env_targets = env_get("boot_targets");
67 	if (env_targets)
68 		env_targets_len = strlen(env_targets);
69 
70 	new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
71 	if (!new_targets)
72 		return -ENOMEM;
73 
74 	sprintf(new_targets, "%s %s", mode,
75 		env_targets ? env_targets : "");
76 
77 	env_set("boot_targets", new_targets);
78 
79 	return 0;
80 }
81 
82 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
dram_init_banksize(void)83 int dram_init_banksize(void)
84 {
85 	return fdtdec_setup_memory_banksize();
86 }
87 
dram_init(void)88 int dram_init(void)
89 {
90 	if (fdtdec_setup_mem_size_base() != 0)
91 		return -EINVAL;
92 
93 	zynq_ddrc_init();
94 
95 	return 0;
96 }
97 #else
dram_init(void)98 int dram_init(void)
99 {
100 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
101 				    CONFIG_SYS_SDRAM_SIZE);
102 
103 	zynq_ddrc_init();
104 
105 	return 0;
106 }
107 #endif
108