1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2000, 2001
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
5 */
6
7 /*
8 * FPGA support
9 */
10 #include <common.h>
11 #include <command.h>
12 #include <env.h>
13 #include <fpga.h>
14 #include <fs.h>
15 #include <gzip.h>
16 #include <malloc.h>
17
do_fpga_get_device(char * arg)18 static long do_fpga_get_device(char *arg)
19 {
20 long dev = FPGA_INVALID_DEVICE;
21 char *devstr = env_get("fpga");
22
23 if (devstr)
24 /* Should be strtol to handle -1 cases */
25 dev = simple_strtol(devstr, NULL, 16);
26
27 if (dev == FPGA_INVALID_DEVICE && arg)
28 dev = simple_strtol(arg, NULL, 16);
29
30 debug("%s: device = %ld\n", __func__, dev);
31
32 return dev;
33 }
34
do_fpga_check_params(long * dev,long * fpga_data,size_t * data_size,cmd_tbl_t * cmdtp,int argc,char * const argv[])35 static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
36 cmd_tbl_t *cmdtp, int argc, char *const argv[])
37 {
38 size_t local_data_size;
39 long local_fpga_data;
40
41 debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
42
43 if (argc != cmdtp->maxargs) {
44 debug("fpga: incorrect parameters passed\n");
45 return CMD_RET_USAGE;
46 }
47
48 *dev = do_fpga_get_device(argv[0]);
49
50 local_fpga_data = simple_strtol(argv[1], NULL, 16);
51 if (!local_fpga_data) {
52 debug("fpga: zero fpga_data address\n");
53 return CMD_RET_USAGE;
54 }
55 *fpga_data = local_fpga_data;
56
57 local_data_size = simple_strtoul(argv[2], NULL, 16);
58 if (!local_data_size) {
59 debug("fpga: zero size\n");
60 return CMD_RET_USAGE;
61 }
62 *data_size = local_data_size;
63
64 return 0;
65 }
66
67 #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
do_fpga_loads(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])68 int do_fpga_loads(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
69 {
70 size_t data_size = 0;
71 long fpga_data, dev;
72 int ret;
73 struct fpga_secure_info fpga_sec_info;
74
75 memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
76
77 if (argc < 5) {
78 debug("fpga: incorrect parameters passed\n");
79 return CMD_RET_USAGE;
80 }
81
82 if (argc == 6)
83 fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
84 simple_strtoull(argv[5],
85 NULL, 16);
86 else
87 /*
88 * If 6th parameter is not passed then do_fpga_check_params
89 * will get 5 instead of expected 6 which means that function
90 * return CMD_RET_USAGE. Increase number of params +1 to pass
91 * this.
92 */
93 argc++;
94
95 fpga_sec_info.encflag = (u8)simple_strtoul(argv[4], NULL, 16);
96 fpga_sec_info.authflag = (u8)simple_strtoul(argv[3], NULL, 16);
97
98 if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
99 fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
100 debug("fpga: Use <fpga load> for NonSecure bitstream\n");
101 return CMD_RET_USAGE;
102 }
103
104 if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
105 !fpga_sec_info.userkey_addr) {
106 debug("fpga: User key not provided\n");
107 return CMD_RET_USAGE;
108 }
109
110 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
111 cmdtp, argc, argv);
112 if (ret)
113 return ret;
114
115 return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
116 }
117 #endif
118
119 #if defined(CONFIG_CMD_FPGA_LOADFS)
do_fpga_loadfs(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])120 static int do_fpga_loadfs(cmd_tbl_t *cmdtp, int flag, int argc,
121 char *const argv[])
122 {
123 size_t data_size = 0;
124 long fpga_data, dev;
125 int ret;
126 fpga_fs_info fpga_fsinfo;
127
128 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
129 cmdtp, argc, argv);
130 if (ret)
131 return ret;
132
133 fpga_fsinfo.fstype = FS_TYPE_ANY;
134 fpga_fsinfo.blocksize = (unsigned int)simple_strtoul(argv[3], NULL, 16);
135 fpga_fsinfo.interface = argv[4];
136 fpga_fsinfo.dev_part = argv[5];
137 fpga_fsinfo.filename = argv[6];
138
139 return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
140 }
141 #endif
142
do_fpga_info(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])143 static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
144 char * const argv[])
145 {
146 long dev = do_fpga_get_device(argv[0]);
147
148 return fpga_info(dev);
149 }
150
do_fpga_dump(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])151 static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
152 char * const argv[])
153 {
154 size_t data_size = 0;
155 long fpga_data, dev;
156 int ret;
157
158 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
159 cmdtp, argc, argv);
160 if (ret)
161 return ret;
162
163 return fpga_dump(dev, (void *)fpga_data, data_size);
164 }
165
do_fpga_load(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])166 static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
167 char * const argv[])
168 {
169 size_t data_size = 0;
170 long fpga_data, dev;
171 int ret;
172
173 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
174 cmdtp, argc, argv);
175 if (ret)
176 return ret;
177
178 return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
179 }
180
do_fpga_loadb(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])181 static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
182 char * const argv[])
183 {
184 size_t data_size = 0;
185 long fpga_data, dev;
186 int ret;
187
188 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
189 cmdtp, argc, argv);
190 if (ret)
191 return ret;
192
193 return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
194 }
195
196 #if defined(CONFIG_CMD_FPGA_LOADP)
do_fpga_loadp(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])197 static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
198 char * const argv[])
199 {
200 size_t data_size = 0;
201 long fpga_data, dev;
202 int ret;
203
204 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
205 cmdtp, argc, argv);
206 if (ret)
207 return ret;
208
209 return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
210 }
211 #endif
212
213 #if defined(CONFIG_CMD_FPGA_LOADBP)
do_fpga_loadbp(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])214 static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
215 char * const argv[])
216 {
217 size_t data_size = 0;
218 long fpga_data, dev;
219 int ret;
220
221 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
222 cmdtp, argc, argv);
223 if (ret)
224 return ret;
225
226 return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
227 BIT_PARTIAL);
228 }
229 #endif
230
231 #if defined(CONFIG_CMD_FPGA_LOADMK)
do_fpga_loadmk(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])232 static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc,
233 char * const argv[])
234 {
235 size_t data_size = 0;
236 void *fpga_data = NULL;
237 #if defined(CONFIG_FIT)
238 const char *fit_uname = NULL;
239 ulong fit_addr;
240 #endif
241 ulong dev = do_fpga_get_device(argv[0]);
242 char *datastr = env_get("fpgadata");
243
244 debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
245
246 if (dev == FPGA_INVALID_DEVICE) {
247 debug("fpga: Invalid fpga device\n");
248 return CMD_RET_USAGE;
249 }
250
251 if (argc == 0 && !datastr) {
252 debug("fpga: No datastr passed\n");
253 return CMD_RET_USAGE;
254 }
255
256 if (argc == 2) {
257 datastr = argv[1];
258 debug("fpga: Full command with two args\n");
259 } else if (argc == 1 && !datastr) {
260 debug("fpga: Dev is setup - fpgadata passed\n");
261 datastr = argv[0];
262 }
263
264 #if defined(CONFIG_FIT)
265 if (fit_parse_subimage(datastr, (ulong)fpga_data,
266 &fit_addr, &fit_uname)) {
267 fpga_data = (void *)fit_addr;
268 debug("* fpga: subimage '%s' from FIT image ",
269 fit_uname);
270 debug("at 0x%08lx\n", fit_addr);
271 } else
272 #endif
273 {
274 fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
275 debug("* fpga: cmdline image address = 0x%08lx\n",
276 (ulong)fpga_data);
277 }
278 debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
279 if (!fpga_data) {
280 puts("Zero fpga_data address\n");
281 return CMD_RET_USAGE;
282 }
283
284 switch (genimg_get_format(fpga_data)) {
285 #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
286 case IMAGE_FORMAT_LEGACY:
287 {
288 image_header_t *hdr = (image_header_t *)fpga_data;
289 ulong data;
290 u8 comp;
291
292 comp = image_get_comp(hdr);
293 if (comp == IH_COMP_GZIP) {
294 #if defined(CONFIG_GZIP)
295 ulong image_buf = image_get_data(hdr);
296 ulong image_size = ~0UL;
297
298 data = image_get_load(hdr);
299
300 if (gunzip((void *)data, ~0UL, (void *)image_buf,
301 &image_size) != 0) {
302 puts("GUNZIP: error\n");
303 return CMD_RET_FAILURE;
304 }
305 data_size = image_size;
306 #else
307 puts("Gunzip image is not supported\n");
308 return 1;
309 #endif
310 } else {
311 data = (ulong)image_get_data(hdr);
312 data_size = image_get_data_size(hdr);
313 }
314 return fpga_load(dev, (void *)data, data_size,
315 BIT_FULL);
316 }
317 #endif
318 #if defined(CONFIG_FIT)
319 case IMAGE_FORMAT_FIT:
320 {
321 const void *fit_hdr = (const void *)fpga_data;
322 int noffset;
323 const void *fit_data;
324
325 if (!fit_uname) {
326 puts("No FIT subimage unit name\n");
327 return CMD_RET_FAILURE;
328 }
329
330 if (!fit_check_format(fit_hdr)) {
331 puts("Bad FIT image format\n");
332 return CMD_RET_FAILURE;
333 }
334
335 /* get fpga component image node offset */
336 noffset = fit_image_get_node(fit_hdr, fit_uname);
337 if (noffset < 0) {
338 printf("Can't find '%s' FIT subimage\n", fit_uname);
339 return CMD_RET_FAILURE;
340 }
341
342 /* verify integrity */
343 if (!fit_image_verify(fit_hdr, noffset)) {
344 puts("Bad Data Hash\n");
345 return CMD_RET_FAILURE;
346 }
347
348 /* get fpga subimage/external data address and length */
349 if (fit_image_get_data_and_size(fit_hdr, noffset,
350 &fit_data, &data_size)) {
351 puts("Fpga subimage data not found\n");
352 return CMD_RET_FAILURE;
353 }
354
355 return fpga_load(dev, fit_data, data_size, BIT_FULL);
356 }
357 #endif
358 default:
359 puts("** Unknown image type\n");
360 return CMD_RET_FAILURE;
361 }
362 }
363 #endif
364
365 static cmd_tbl_t fpga_commands[] = {
366 U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
367 U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
368 U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
369 U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
370 #if defined(CONFIG_CMD_FPGA_LOADP)
371 U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
372 #endif
373 #if defined(CONFIG_CMD_FPGA_LOADBP)
374 U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
375 #endif
376 #if defined(CONFIG_CMD_FPGA_LOADFS)
377 U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
378 #endif
379 #if defined(CONFIG_CMD_FPGA_LOADMK)
380 U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
381 #endif
382 #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
383 U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
384 #endif
385 };
386
do_fpga_wrapper(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])387 static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
388 char *const argv[])
389 {
390 cmd_tbl_t *fpga_cmd;
391 int ret;
392
393 if (argc < 2)
394 return CMD_RET_USAGE;
395
396 fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
397 ARRAY_SIZE(fpga_commands));
398 if (!fpga_cmd) {
399 debug("fpga: non existing command\n");
400 return CMD_RET_USAGE;
401 }
402
403 argc -= 2;
404 argv += 2;
405
406 if (argc > fpga_cmd->maxargs) {
407 debug("fpga: more parameters passed\n");
408 return CMD_RET_USAGE;
409 }
410
411 ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
412
413 return cmd_process_error(fpga_cmd, ret);
414 }
415
416 #if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
417 U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
418 #else
419 U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
420 #endif
421 "loadable FPGA image support",
422 "[operation type] [device number] [image address] [image size]\n"
423 "fpga operations:\n"
424 " dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
425 " info\t[dev]\t\t\tlist known device information\n"
426 " load\t[dev] [address] [size]\tLoad device from memory buffer\n"
427 #if defined(CONFIG_CMD_FPGA_LOADP)
428 " loadp\t[dev] [address] [size]\t"
429 "Load device from memory buffer with partial bitstream\n"
430 #endif
431 " loadb\t[dev] [address] [size]\t"
432 "Load device from bitstream buffer (Xilinx only)\n"
433 #if defined(CONFIG_CMD_FPGA_LOADBP)
434 " loadbp\t[dev] [address] [size]\t"
435 "Load device from bitstream buffer with partial bitstream"
436 "(Xilinx only)\n"
437 #endif
438 #if defined(CONFIG_CMD_FPGA_LOADFS)
439 "Load device from filesystem (FAT by default) (Xilinx only)\n"
440 " loadfs [dev] [address] [image size] [blocksize] <interface>\n"
441 " [<dev[:part]>] <filename>\n"
442 #endif
443 #if defined(CONFIG_CMD_FPGA_LOADMK)
444 " loadmk [dev] [address]\tLoad device generated with mkimage"
445 #if defined(CONFIG_FIT)
446 "\n"
447 "\tFor loadmk operating on FIT format uImage address must include\n"
448 "\tsubimage unit name in the form of addr:<subimg_uname>"
449 #endif
450 #endif
451 #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
452 "Load encrypted bitstream (Xilinx only)\n"
453 " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
454 " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
455 "Loads the secure bistreams(authenticated/encrypted/both\n"
456 "authenticated and encrypted) of [size] from [address].\n"
457 "The auth-OCM/DDR flag specifies to perform authentication\n"
458 "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
459 "The enc flag specifies which key to be used for decryption\n"
460 "0-device key, 1-user key, 2-no encryption.\n"
461 "The optional Userkey address specifies from which address key\n"
462 "has to be used for decryption if user key is selected.\n"
463 "NOTE: the secure bitstream has to be created using Xilinx\n"
464 "bootgen tool only.\n"
465 #endif
466 );
467