1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018 Microhip / Atmel Corporation
4 * Wenyou.Yang <wenyou.yang@microchip.com>
5 */
6
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm/device.h>
10 #include <linux/io.h>
11 #include <mach/at91_pmc.h>
12 #include "pmc.h"
13
at91_plladiv_clk_enable(struct clk * clk)14 static int at91_plladiv_clk_enable(struct clk *clk)
15 {
16 return 0;
17 }
18
at91_plladiv_clk_get_rate(struct clk * clk)19 static ulong at91_plladiv_clk_get_rate(struct clk *clk)
20 {
21 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
22 struct at91_pmc *pmc = plat->reg_base;
23 struct clk source;
24 ulong clk_rate;
25 int ret;
26
27 ret = clk_get_by_index(clk->dev, 0, &source);
28 if (ret)
29 return -EINVAL;
30
31 clk_rate = clk_get_rate(&source);
32 if (readl(&pmc->mckr) & AT91_PMC_MCKR_PLLADIV_2)
33 clk_rate /= 2;
34
35 return clk_rate;
36 }
37
at91_plladiv_clk_set_rate(struct clk * clk,ulong rate)38 static ulong at91_plladiv_clk_set_rate(struct clk *clk, ulong rate)
39 {
40 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
41 struct at91_pmc *pmc = plat->reg_base;
42 struct clk source;
43 ulong parent_rate;
44 int ret;
45
46 ret = clk_get_by_index(clk->dev, 0, &source);
47 if (ret)
48 return -EINVAL;
49
50 parent_rate = clk_get_rate(&source);
51 if ((parent_rate != rate) && ((parent_rate) / 2 != rate))
52 return -EINVAL;
53
54 if (parent_rate != rate) {
55 writel((readl(&pmc->mckr) | AT91_PMC_MCKR_PLLADIV_2),
56 &pmc->mckr);
57 }
58
59 return 0;
60 }
61
62 static struct clk_ops at91_plladiv_clk_ops = {
63 .enable = at91_plladiv_clk_enable,
64 .get_rate = at91_plladiv_clk_get_rate,
65 .set_rate = at91_plladiv_clk_set_rate,
66 };
67
at91_plladiv_clk_probe(struct udevice * dev)68 static int at91_plladiv_clk_probe(struct udevice *dev)
69 {
70 return at91_pmc_core_probe(dev);
71 }
72
73 static const struct udevice_id at91_plladiv_clk_match[] = {
74 { .compatible = "atmel,at91sam9x5-clk-plldiv" },
75 {}
76 };
77
78 U_BOOT_DRIVER(at91_plladiv_clk) = {
79 .name = "at91-plladiv-clk",
80 .id = UCLASS_CLK,
81 .of_match = at91_plladiv_clk_match,
82 .probe = at91_plladiv_clk_probe,
83 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
84 .ops = &at91_plladiv_clk_ops,
85 };
86