1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2019 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5 *
6 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
7 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Gated clock implementation
14 *
15 */
16
17 #include <common.h>
18 #include <asm/io.h>
19 #include <malloc.h>
20 #include <clk-uclass.h>
21 #include <dm/device.h>
22 #include <linux/clk-provider.h>
23 #include <clk.h>
24 #include "clk.h"
25
26 #define UBOOT_DM_CLK_IMX_GATE2 "imx_clk_gate2"
27
28 struct clk_gate2 {
29 struct clk clk;
30 void __iomem *reg;
31 u8 bit_idx;
32 u8 cgr_val;
33 u8 flags;
34 };
35
36 #define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
37
clk_gate2_enable(struct clk * clk)38 static int clk_gate2_enable(struct clk *clk)
39 {
40 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev));
41 u32 reg;
42
43 reg = readl(gate->reg);
44 reg &= ~(3 << gate->bit_idx);
45 reg |= gate->cgr_val << gate->bit_idx;
46 writel(reg, gate->reg);
47
48 return 0;
49 }
50
clk_gate2_disable(struct clk * clk)51 static int clk_gate2_disable(struct clk *clk)
52 {
53 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev));
54 u32 reg;
55
56 reg = readl(gate->reg);
57 reg &= ~(3 << gate->bit_idx);
58 writel(reg, gate->reg);
59
60 return 0;
61 }
62
clk_gate2_set_rate(struct clk * clk,ulong rate)63 static ulong clk_gate2_set_rate(struct clk *clk, ulong rate)
64 {
65 struct clk *parent = clk_get_parent(clk);
66
67 if (parent)
68 return clk_set_rate(parent, rate);
69
70 return -ENODEV;
71 }
72
73 static const struct clk_ops clk_gate2_ops = {
74 .set_rate = clk_gate2_set_rate,
75 .enable = clk_gate2_enable,
76 .disable = clk_gate2_disable,
77 .get_rate = clk_generic_get_rate,
78 };
79
clk_register_gate2(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 cgr_val,u8 clk_gate2_flags)80 struct clk *clk_register_gate2(struct device *dev, const char *name,
81 const char *parent_name, unsigned long flags,
82 void __iomem *reg, u8 bit_idx, u8 cgr_val,
83 u8 clk_gate2_flags)
84 {
85 struct clk_gate2 *gate;
86 struct clk *clk;
87 int ret;
88
89 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
90 if (!gate)
91 return ERR_PTR(-ENOMEM);
92
93 gate->reg = reg;
94 gate->bit_idx = bit_idx;
95 gate->cgr_val = cgr_val;
96 gate->flags = clk_gate2_flags;
97
98 clk = &gate->clk;
99
100 ret = clk_register(clk, UBOOT_DM_CLK_IMX_GATE2, name, parent_name);
101 if (ret) {
102 kfree(gate);
103 return ERR_PTR(ret);
104 }
105
106 return clk;
107 }
108
109 U_BOOT_DRIVER(clk_gate2) = {
110 .name = UBOOT_DM_CLK_IMX_GATE2,
111 .id = UCLASS_CLK,
112 .ops = &clk_gate2_ops,
113 .flags = DM_FLAG_PRE_RELOC,
114 };
115