1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Marvell SD Host Controller Interface
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <malloc.h>
9 #include <sdhci.h>
10 #include <linux/mbus.h>
11
12 #define MVSDH_NAME "mv_sdh"
13
14 #define SDHCI_WINDOW_CTRL(win) (0x4080 + ((win) << 4))
15 #define SDHCI_WINDOW_BASE(win) (0x4084 + ((win) << 4))
16
sdhci_mvebu_mbus_config(void __iomem * base)17 static void sdhci_mvebu_mbus_config(void __iomem *base)
18 {
19 const struct mbus_dram_target_info *dram;
20 int i;
21
22 dram = mvebu_mbus_dram_info();
23
24 for (i = 0; i < 4; i++) {
25 writel(0, base + SDHCI_WINDOW_CTRL(i));
26 writel(0, base + SDHCI_WINDOW_BASE(i));
27 }
28
29 for (i = 0; i < dram->num_cs; i++) {
30 const struct mbus_dram_window *cs = dram->cs + i;
31
32 /* Write size, attributes and target id to control register */
33 writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
34 (dram->mbus_dram_target_id << 4) | 1,
35 base + SDHCI_WINDOW_CTRL(i));
36
37 /* Write base address to base register */
38 writel(cs->base, base + SDHCI_WINDOW_BASE(i));
39 }
40 }
41
42 #ifndef CONFIG_DM_MMC
43
44 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
45 static struct sdhci_ops mv_ops;
46
47 #if defined(CONFIG_SHEEVA_88SV331xV5)
48 #define SD_CE_ATA_2 0xEA
49 #define MMC_CARD 0x1000
50 #define MMC_WIDTH 0x0100
mv_sdhci_writeb(struct sdhci_host * host,u8 val,int reg)51 static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
52 {
53 struct mmc *mmc = host->mmc;
54 u32 ata = (unsigned long)host->ioaddr + SD_CE_ATA_2;
55
56 if (!IS_SD(mmc) && reg == SDHCI_HOST_CONTROL) {
57 if (mmc->bus_width == 8)
58 writew(readw(ata) | (MMC_CARD | MMC_WIDTH), ata);
59 else
60 writew(readw(ata) & ~(MMC_CARD | MMC_WIDTH), ata);
61 }
62
63 writeb(val, host->ioaddr + reg);
64 }
65
66 #else
67 #define mv_sdhci_writeb NULL
68 #endif /* CONFIG_SHEEVA_88SV331xV5 */
69 #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
70
mv_sdh_init(unsigned long regbase,u32 max_clk,u32 min_clk,u32 quirks)71 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
72 {
73 struct sdhci_host *host = NULL;
74 host = calloc(1, sizeof(*host));
75 if (!host) {
76 printf("sdh_host malloc fail!\n");
77 return -ENOMEM;
78 }
79
80 host->name = MVSDH_NAME;
81 host->ioaddr = (void *)regbase;
82 host->quirks = quirks;
83 host->max_clk = max_clk;
84 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
85 memset(&mv_ops, 0, sizeof(struct sdhci_ops));
86 mv_ops.write_b = mv_sdhci_writeb;
87 host->ops = &mv_ops;
88 #endif
89
90 if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
91 /* Configure SDHCI MBUS mbus bridge windows */
92 sdhci_mvebu_mbus_config((void __iomem *)regbase);
93 }
94
95 return add_sdhci(host, 0, min_clk);
96 }
97
98 #else
99
100 DECLARE_GLOBAL_DATA_PTR;
101
102 struct mv_sdhci_plat {
103 struct mmc_config cfg;
104 struct mmc mmc;
105 };
106
mv_sdhci_probe(struct udevice * dev)107 static int mv_sdhci_probe(struct udevice *dev)
108 {
109 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
110 struct mv_sdhci_plat *plat = dev_get_platdata(dev);
111 struct sdhci_host *host = dev_get_priv(dev);
112 int ret;
113
114 host->name = MVSDH_NAME;
115 host->ioaddr = (void *)devfdt_get_addr(dev);
116 host->quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
117 host->mmc = &plat->mmc;
118 host->mmc->dev = dev;
119 host->mmc->priv = host;
120
121 ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
122 if (ret)
123 return ret;
124
125 if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
126 /* Configure SDHCI MBUS mbus bridge windows */
127 sdhci_mvebu_mbus_config(host->ioaddr);
128 }
129
130 upriv->mmc = host->mmc;
131
132 return sdhci_probe(dev);
133 }
134
mv_sdhci_bind(struct udevice * dev)135 static int mv_sdhci_bind(struct udevice *dev)
136 {
137 struct mv_sdhci_plat *plat = dev_get_platdata(dev);
138
139 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
140 }
141
142 static const struct udevice_id mv_sdhci_ids[] = {
143 { .compatible = "marvell,armada-380-sdhci" },
144 { }
145 };
146
147 U_BOOT_DRIVER(mv_sdhci_drv) = {
148 .name = MVSDH_NAME,
149 .id = UCLASS_MMC,
150 .of_match = mv_sdhci_ids,
151 .bind = mv_sdhci_bind,
152 .probe = mv_sdhci_probe,
153 .ops = &sdhci_ops,
154 .priv_auto_alloc_size = sizeof(struct sdhci_host),
155 .platdata_auto_alloc_size = sizeof(struct mv_sdhci_plat),
156 };
157 #endif /* CONFIG_DM_MMC */
158