1 2config BITBANGMII 3 bool "Bit-banged ethernet MII management channel support" 4 5config MV88E6352_SWITCH 6 bool "Marvell 88E6352 switch support" 7 8menuconfig PHYLIB 9 bool "Ethernet PHY (physical media interface) support" 10 depends on NET 11 help 12 Enable Ethernet PHY (physical media interface) support. 13 14if PHYLIB 15 16config PHY_ADDR_ENABLE 17 bool "Limit phy address" 18 default y if ARCH_SUNXI 19 help 20 Select this if you want to control which phy address is used 21 22if PHY_ADDR_ENABLE 23config PHY_ADDR 24 int "PHY address" 25 default 1 if ARCH_SUNXI 26 default 0 27 help 28 The address of PHY on MII bus. Usually in range of 0 to 31. 29endif 30 31config B53_SWITCH 32 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support." 33 help 34 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches. 35 This currently supports BCM53125 and similar models. 36 37if B53_SWITCH 38 39config B53_CPU_PORT 40 int "CPU port" 41 default 8 42 43config B53_PHY_PORTS 44 hex "Bitmask of PHY ports" 45 46endif # B53_SWITCH 47 48config MV88E61XX_SWITCH 49 bool "Marvell MV88E61xx Ethernet switch PHY support." 50 51if MV88E61XX_SWITCH 52 53config MV88E61XX_CPU_PORT 54 int "CPU Port" 55 56config MV88E61XX_PHY_PORTS 57 hex "Bitmask of PHY Ports" 58 59config MV88E61XX_FIXED_PORTS 60 hex "Bitmask of PHYless serdes Ports" 61 62endif # MV88E61XX_SWITCH 63 64config PHYLIB_10G 65 bool "Generic 10G PHY support" 66 67menuconfig PHY_AQUANTIA 68 bool "Aquantia Ethernet PHYs support" 69 select PHY_GIGE 70 select PHYLIB_10G 71 72config PHY_AQUANTIA_UPLOAD_FW 73 bool "Aquantia firmware loading support" 74 default n 75 depends on PHY_AQUANTIA 76 help 77 Aquantia PHYs use firmware which can be either loaded automatically 78 from storage directly attached to the phy or loaded by the boot loader 79 via MDIO commands. The firmware is loaded from a file, specified by 80 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options. 81 82config PHY_AQUANTIA_FW_PART 83 string "Aquantia firmware partition" 84 depends on PHY_AQUANTIA_UPLOAD_FW 85 help 86 Partition containing the firmware file. 87 88config PHY_AQUANTIA_FW_NAME 89 string "Aquantia firmware filename" 90 depends on PHY_AQUANTIA_UPLOAD_FW 91 help 92 Firmware filename. 93 94config PHY_ATHEROS 95 bool "Atheros Ethernet PHYs support" 96 97config PHY_BROADCOM 98 bool "Broadcom Ethernet PHYs support" 99 100config PHY_CORTINA 101 bool "Cortina Ethernet PHYs support" 102 103choice 104 prompt "Location of the Cortina firmware" 105 default SYS_CORTINA_FW_IN_NOR 106 depends on PHY_CORTINA 107 108config SYS_CORTINA_FW_IN_MMC 109 bool "Cortina firmware in MMC" 110 111config SYS_CORTINA_FW_IN_NAND 112 bool "Cortina firmware in NAND flash" 113 114config SYS_CORTINA_FW_IN_NOR 115 bool "Cortina firmware in NOR flash" 116 117config SYS_CORTINA_FW_IN_REMOTE 118 bool "Cortina firmware in remote device" 119 120config SYS_CORTINA_FW_IN_SPIFLASH 121 bool "Cortina firmware in SPI flash" 122 123endchoice 124 125config PHY_DAVICOM 126 bool "Davicom Ethernet PHYs support" 127 128config PHY_ET1011C 129 bool "LSI TruePHY ET1011C support" 130 131config PHY_LXT 132 bool "LXT971 Ethernet PHY support" 133 134config PHY_MARVELL 135 bool "Marvell Ethernet PHYs support" 136 137config PHY_MESON_GXL 138 bool "Amlogic Meson GXL Internal PHY support" 139 140config PHY_MICREL 141 bool "Micrel Ethernet PHYs support" 142 help 143 Enable support for the GbE PHYs manufactured by Micrel (now 144 a part of Microchip). This includes drivers for the KSZ804, KSZ8031, 145 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx 146 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel 147 KSZ90x1 family support" is selected). 148 149if PHY_MICREL 150 151config PHY_MICREL_KSZ9021 152 bool 153 select PHY_MICREL_KSZ90X1 154 155config PHY_MICREL_KSZ9031 156 bool 157 select PHY_MICREL_KSZ90X1 158 159config PHY_MICREL_KSZ90X1 160 bool "Micrel KSZ90x1 family support" 161 select PHY_GIGE 162 help 163 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If 164 enabled, the extended register read/write for KSZ90x1 PHYs 165 is supported through the 'mdio' command and any RGMII signal 166 delays configured in the device tree will be applied to the 167 PHY during initialization. 168 169config PHY_MICREL_KSZ8XXX 170 bool "Micrel KSZ8xxx family support" 171 help 172 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel 173 (now a part of Microchip). This includes drivers for the KSZ804, 174 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721. 175 176endif # PHY_MICREL 177 178config PHY_MSCC 179 bool "Microsemi Corp Ethernet PHYs support" 180 181config PHY_NATSEMI 182 bool "National Semiconductor Ethernet PHYs support" 183 184config PHY_REALTEK 185 bool "Realtek Ethernet PHYs support" 186 187config RTL8211E_PINE64_GIGABIT_FIX 188 bool "Fix gigabit throughput on some Pine64+ models" 189 depends on PHY_REALTEK 190 help 191 Configure the Realtek RTL8211E found on some Pine64+ models differently to 192 fix throughput on Gigabit links, turning off all internal delays in the 193 process. The settings that this touches are not documented in the CONFREG 194 section of the RTL8211E datasheet, but come from Realtek by way of the 195 Pine64 engineering team. 196 197config RTL8211X_PHY_FORCE_MASTER 198 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode" 199 depends on PHY_REALTEK 200 help 201 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F). 202 This can work around link stability and data corruption issues on gigabit 203 links which can occur in slave mode on certain PHYs, e.g. on the 204 RTL8211C(L). 205 206 Please note that two directly connected devices (i.e. via crossover cable) 207 will not be able to establish a link between each other if they both force 208 master mode. Multiple devices forcing master mode when connected by a 209 network switch do not pose a problem as the switch configures its affected 210 ports into slave mode. 211 212 This option only affects gigabit links. If you must establish a direct 213 connection between two devices which both force master mode, try forcing 214 the link speed to 100MBit/s. 215 216 If unsure, say N. 217 218config RTL8211F_PHY_FORCE_EEE_RXC_ON 219 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI" 220 depends on PHY_REALTEK 221 default n 222 help 223 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate 224 transitions to/from a lower power consumption level (Low Power Idle 225 mode) based on link utilization. When no packets are being 226 transmitted, the system goes to Low Power Idle mode to save power. 227 228 Under particular circumstances this setting can cause issues where 229 the PHY is unable to transmit or receive any packet when in LPI mode. 230 The problem is caused when the PHY is configured to stop receiving 231 the xMII clock while it is signaling LPI. For some PHYs the bit 232 configuring this behavior is set by the Linux kernel, causing the 233 issue in U-Boot on reboot if the PHY retains the register value. 234 235 Default n, which means that the PHY state is not changed. To work 236 around the issues, change this setting to y. 237 238config PHY_SMSC 239 bool "Microchip(SMSC) Ethernet PHYs support" 240 241config PHY_TERANETICS 242 bool "Teranetics Ethernet PHYs support" 243 244config PHY_TI 245 bool "Texas Instruments Ethernet PHYs support" 246 247config PHY_VITESSE 248 bool "Vitesse Ethernet PHYs support" 249 250config PHY_XILINX 251 bool "Xilinx Ethernet PHYs support" 252 253config PHY_XILINX_GMII2RGMII 254 bool "Xilinx GMII to RGMII Ethernet PHYs support" 255 help 256 This adds support for Xilinx GMII to RGMII IP core. This IP acts 257 as bridge between MAC connected over GMII and external phy that 258 is connected over RGMII interface. 259 260config PHY_FIXED 261 bool "Fixed-Link PHY" 262 depends on DM_ETH 263 help 264 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct 265 connection (MII, RGMII, ...). 266 There is nothing like autoneogation and so 267 on, the link is always up with fixed speed and fixed duplex-setting. 268 More information: doc/device-tree-bindings/net/fixed-link.txt 269 270endif #PHYLIB 271