1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2018
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7 #include <common.h>
8 #include <board.h>
9 #include <clk.h>
10 #include <dm.h>
11 #include <irq_func.h>
12 #include <status_led.h>
13 #include <time.h>
14 #include <timer.h>
15 #include <watchdog.h>
16
17 DECLARE_GLOBAL_DATA_PTR;
18
19 /**
20 * struct mpc83xx_timer_priv - Private data structure for MPC83xx timer driver
21 * @decrementer_count: Value to which the decrementer register should be re-set
22 * to when a timer interrupt occurs, thus determines the
23 * interrupt frequency (value for 1e6/HZ microseconds)
24 * @timestamp: Counter for the number of timer interrupts that have
25 * occurred (i.e. can be used to trigger events
26 * periodically in the timer interrupt)
27 */
28 struct mpc83xx_timer_priv {
29 uint decrementer_count;
30 ulong timestamp;
31 };
32
33 /*
34 * Bitmask for enabling the time base in the SPCR (System Priority
35 * Configuration Register)
36 */
37 static const u32 SPCR_TBEN_MASK = BIT(31 - 9);
38
39 /**
40 * get_dec() - Get the value of the decrementer register
41 *
42 * Return: The value of the decrementer register
43 */
get_dec(void)44 static inline unsigned long get_dec(void)
45 {
46 unsigned long val;
47
48 asm volatile ("mfdec %0" : "=r" (val) : );
49
50 return val;
51 }
52
53 /**
54 * set_dec() - Set the value of the decrementer register
55 * @val: The value of the decrementer register to be set
56 */
set_dec(unsigned long val)57 static inline void set_dec(unsigned long val)
58 {
59 if (val)
60 asm volatile ("mtdec %0"::"r" (val));
61 }
62
63 /**
64 * mftbu() - Get value of TBU (upper time base) register
65 *
66 * Return: Value of the TBU register
67 */
mftbu(void)68 static inline u32 mftbu(void)
69 {
70 u32 rval;
71
72 asm volatile("mftbu %0" : "=r" (rval));
73 return rval;
74 }
75
76 /**
77 * mftb() - Get value of TBL (lower time base) register
78 *
79 * Return: Value of the TBL register
80 */
mftb(void)81 static inline u32 mftb(void)
82 {
83 u32 rval;
84
85 asm volatile("mftb %0" : "=r" (rval));
86 return rval;
87 }
88
89 /*
90 * TODO(mario.six@gdsys.cc): This should really be done by timer_init, and the
91 * interrupt init should go into a interrupt driver.
92 */
interrupt_init(void)93 int interrupt_init(void)
94 {
95 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
96 struct udevice *csb;
97 struct udevice *board;
98 struct udevice *timer;
99 struct mpc83xx_timer_priv *timer_priv;
100 struct clk clock;
101 int ret;
102
103 ret = uclass_first_device_err(UCLASS_TIMER, &timer);
104 if (ret) {
105 debug("%s: Could not find timer device (error: %d)",
106 __func__, ret);
107 return ret;
108 }
109
110 timer_priv = dev_get_priv(timer);
111
112 if (board_get(&board)) {
113 debug("%s: board device could not be fetched.\n", __func__);
114 return -ENOENT;
115 }
116
117 ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, board,
118 "csb", &csb);
119 if (ret) {
120 debug("%s: Could not retrieve CSB device (error: %d)",
121 __func__, ret);
122 return ret;
123 }
124
125 ret = clk_get_by_index(csb, 0, &clock);
126 if (ret) {
127 debug("%s: Could not retrieve clock (error: %d)",
128 __func__, ret);
129 return ret;
130 }
131
132 timer_priv->decrementer_count = (clk_get_rate(&clock) / 4)
133 / CONFIG_SYS_HZ;
134 /* Enable e300 time base */
135 setbits_be32(&immr->sysconf.spcr, SPCR_TBEN_MASK);
136
137 set_dec(timer_priv->decrementer_count);
138
139 /* Switch on interrupts */
140 set_msr(get_msr() | MSR_EE);
141
142 return 0;
143 }
144
145 /**
146 * timer_interrupt() - Handler for the timer interrupt
147 * @regs: Array of register values
148 */
timer_interrupt(struct pt_regs * regs)149 void timer_interrupt(struct pt_regs *regs)
150 {
151 struct udevice *timer = gd->timer;
152 struct mpc83xx_timer_priv *priv;
153
154 /*
155 * During initialization, gd->timer might not be set yet, but the timer
156 * interrupt may already be enabled. In this case, wait for the
157 * initialization to complete
158 */
159 if (!timer)
160 return;
161
162 priv = dev_get_priv(timer);
163
164 /* Restore Decrementer Count */
165 set_dec(priv->decrementer_count);
166
167 priv->timestamp++;
168
169 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
170 if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
171 WATCHDOG_RESET();
172 #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
173
174 #ifdef CONFIG_LED_STATUS
175 status_led_tick(priv->timestamp);
176 #endif /* CONFIG_LED_STATUS */
177 }
178
wait_ticks(ulong ticks)179 void wait_ticks(ulong ticks)
180 {
181 ulong end = get_ticks() + ticks;
182
183 while (end > get_ticks())
184 WATCHDOG_RESET();
185 }
186
mpc83xx_timer_get_count(struct udevice * dev,u64 * count)187 static int mpc83xx_timer_get_count(struct udevice *dev, u64 *count)
188 {
189 u32 tbu, tbl;
190
191 /*
192 * To make sure that no tbl overflow occurred between reading tbl and
193 * tbu, read tbu again, and compare it with the previously read tbu
194 * value: If they're different, a tbl overflow has occurred.
195 */
196 do {
197 tbu = mftbu();
198 tbl = mftb();
199 } while (tbu != mftbu());
200
201 *count = (tbu * 0x10000ULL) + tbl;
202
203 return 0;
204 }
205
mpc83xx_timer_probe(struct udevice * dev)206 static int mpc83xx_timer_probe(struct udevice *dev)
207 {
208 struct timer_dev_priv *uc_priv = dev->uclass_priv;
209 struct clk clock;
210 int ret;
211
212 ret = interrupt_init();
213 if (ret) {
214 debug("%s: interrupt_init failed (err = %d)\n",
215 dev->name, ret);
216 return ret;
217 }
218
219 ret = clk_get_by_index(dev, 0, &clock);
220 if (ret) {
221 debug("%s: Could not retrieve clock (err = %d)\n",
222 dev->name, ret);
223 return ret;
224 }
225
226 uc_priv->clock_rate = (clk_get_rate(&clock) + 3L) / 4L;
227
228 return 0;
229 }
230
231 static const struct timer_ops mpc83xx_timer_ops = {
232 .get_count = mpc83xx_timer_get_count,
233 };
234
235 static const struct udevice_id mpc83xx_timer_ids[] = {
236 { .compatible = "fsl,mpc83xx-timer" },
237 { /* sentinel */ }
238 };
239
240 U_BOOT_DRIVER(mpc83xx_timer) = {
241 .name = "mpc83xx_timer",
242 .id = UCLASS_TIMER,
243 .of_match = mpc83xx_timer_ids,
244 .probe = mpc83xx_timer_probe,
245 .ops = &mpc83xx_timer_ops,
246 .priv_auto_alloc_size = sizeof(struct mpc83xx_timer_priv),
247 };
248