1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
5 *
6 * Copyright (C) 2008 for Samsung Electronics
7 *
8 * BSP Support for Samsung's UDC driver
9 * available at:
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 *
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
14 *
15 * Ported to u-boot:
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
18 */
19 #undef DEBUG
20 #include <common.h>
21 #include <clk.h>
22 #include <dm.h>
23 #include <generic-phy.h>
24 #include <malloc.h>
25 #include <reset.h>
26
27 #include <linux/errno.h>
28 #include <linux/list.h>
29
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/otg.h>
32 #include <linux/usb/gadget.h>
33
34 #include <asm/byteorder.h>
35 #include <asm/unaligned.h>
36 #include <asm/io.h>
37
38 #include <asm/mach-types.h>
39
40 #include <power/regulator.h>
41
42 #include "dwc2_udc_otg_regs.h"
43 #include "dwc2_udc_otg_priv.h"
44
45 /***********************************************************/
46
47 #define OTG_DMA_MODE 1
48
49 #define DEBUG_SETUP 0
50 #define DEBUG_EP0 0
51 #define DEBUG_ISR 0
52 #define DEBUG_OUT_EP 0
53 #define DEBUG_IN_EP 0
54
55 #include <usb/dwc2_udc.h>
56
57 #define EP0_CON 0
58 #define EP_MASK 0xF
59
60 static char *state_names[] = {
61 "WAIT_FOR_SETUP",
62 "DATA_STATE_XMIT",
63 "DATA_STATE_NEED_ZLP",
64 "WAIT_FOR_OUT_STATUS",
65 "DATA_STATE_RECV",
66 "WAIT_FOR_COMPLETE",
67 "WAIT_FOR_OUT_COMPLETE",
68 "WAIT_FOR_IN_COMPLETE",
69 "WAIT_FOR_NULL_COMPLETE",
70 };
71
72 #define DRIVER_VERSION "15 March 2009"
73
74 struct dwc2_udc *the_controller;
75
76 static const char driver_name[] = "dwc2-udc";
77 static const char ep0name[] = "ep0-control";
78
79 /* Max packet size*/
80 static unsigned int ep0_fifo_size = 64;
81 static unsigned int ep_fifo_size = 512;
82 static unsigned int ep_fifo_size2 = 1024;
83 static int reset_available = 1;
84
85 static struct usb_ctrlrequest *usb_ctrl;
86 static dma_addr_t usb_ctrl_dma_addr;
87
88 /*
89 Local declarations.
90 */
91 static int dwc2_ep_enable(struct usb_ep *ep,
92 const struct usb_endpoint_descriptor *);
93 static int dwc2_ep_disable(struct usb_ep *ep);
94 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
95 gfp_t gfp_flags);
96 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
97
98 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
99 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
100 static int dwc2_fifo_status(struct usb_ep *ep);
101 static void dwc2_fifo_flush(struct usb_ep *ep);
102 static void dwc2_ep0_read(struct dwc2_udc *dev);
103 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
104 static void dwc2_handle_ep0(struct dwc2_udc *dev);
105 static int dwc2_ep0_write(struct dwc2_udc *dev);
106 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
107 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
108 static void stop_activity(struct dwc2_udc *dev,
109 struct usb_gadget_driver *driver);
110 static int udc_enable(struct dwc2_udc *dev);
111 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
112 static void reconfig_usbd(struct dwc2_udc *dev);
113 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
114 static void nuke(struct dwc2_ep *ep, int status);
115 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
116 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
117
set_udc_gadget_private_data(void * p)118 void set_udc_gadget_private_data(void *p)
119 {
120 debug_cond(DEBUG_SETUP != 0,
121 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
122 the_controller, p);
123 the_controller->gadget.dev.device_data = p;
124 }
125
get_udc_gadget_private_data(struct usb_gadget * gadget)126 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
127 {
128 return gadget->dev.device_data;
129 }
130
131 static struct usb_ep_ops dwc2_ep_ops = {
132 .enable = dwc2_ep_enable,
133 .disable = dwc2_ep_disable,
134
135 .alloc_request = dwc2_alloc_request,
136 .free_request = dwc2_free_request,
137
138 .queue = dwc2_queue,
139 .dequeue = dwc2_dequeue,
140
141 .set_halt = dwc2_udc_set_halt,
142 .fifo_status = dwc2_fifo_status,
143 .fifo_flush = dwc2_fifo_flush,
144 };
145
146 #define create_proc_files() do {} while (0)
147 #define remove_proc_files() do {} while (0)
148
149 /***********************************************************/
150
151 struct dwc2_usbotg_reg *reg;
152
dfu_usb_get_reset(void)153 bool dfu_usb_get_reset(void)
154 {
155 return !!(readl(®->gintsts) & INT_RESET);
156 }
157
otg_phy_init(struct dwc2_udc * dev)158 __weak void otg_phy_init(struct dwc2_udc *dev) {}
otg_phy_off(struct dwc2_udc * dev)159 __weak void otg_phy_off(struct dwc2_udc *dev) {}
160
161 /***********************************************************/
162
163 #include "dwc2_udc_otg_xfer_dma.c"
164
165 /*
166 * udc_disable - disable USB device controller
167 */
udc_disable(struct dwc2_udc * dev)168 static void udc_disable(struct dwc2_udc *dev)
169 {
170 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
171
172 udc_set_address(dev, 0);
173
174 dev->ep0state = WAIT_FOR_SETUP;
175 dev->gadget.speed = USB_SPEED_UNKNOWN;
176 dev->usb_address = 0;
177
178 otg_phy_off(dev);
179 }
180
181 /*
182 * udc_reinit - initialize software state
183 */
udc_reinit(struct dwc2_udc * dev)184 static void udc_reinit(struct dwc2_udc *dev)
185 {
186 unsigned int i;
187
188 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
189
190 /* device/ep0 records init */
191 INIT_LIST_HEAD(&dev->gadget.ep_list);
192 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
193 dev->ep0state = WAIT_FOR_SETUP;
194
195 /* basic endpoint records init */
196 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
197 struct dwc2_ep *ep = &dev->ep[i];
198
199 if (i != 0)
200 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
201
202 ep->desc = 0;
203 ep->stopped = 0;
204 INIT_LIST_HEAD(&ep->queue);
205 ep->pio_irqs = 0;
206 }
207
208 /* the rest was statically initialized, and is read-only */
209 }
210
211 #define BYTES2MAXP(x) (x / 8)
212 #define MAXP2BYTES(x) (x * 8)
213
214 /* until it's enabled, this UDC should be completely invisible
215 * to any USB host.
216 */
udc_enable(struct dwc2_udc * dev)217 static int udc_enable(struct dwc2_udc *dev)
218 {
219 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
220
221 otg_phy_init(dev);
222 reconfig_usbd(dev);
223
224 debug_cond(DEBUG_SETUP != 0,
225 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
226 readl(®->gintmsk));
227
228 dev->gadget.speed = USB_SPEED_UNKNOWN;
229
230 return 0;
231 }
232
233 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
234 /*
235 Register entry point for the peripheral controller driver.
236 */
usb_gadget_register_driver(struct usb_gadget_driver * driver)237 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
238 {
239 struct dwc2_udc *dev = the_controller;
240 int retval = 0;
241 unsigned long flags = 0;
242
243 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
244
245 if (!driver
246 || (driver->speed != USB_SPEED_FULL
247 && driver->speed != USB_SPEED_HIGH)
248 || !driver->bind || !driver->disconnect || !driver->setup)
249 return -EINVAL;
250 if (!dev)
251 return -ENODEV;
252 if (dev->driver)
253 return -EBUSY;
254
255 spin_lock_irqsave(&dev->lock, flags);
256 /* first hook up the driver ... */
257 dev->driver = driver;
258 spin_unlock_irqrestore(&dev->lock, flags);
259
260 if (retval) { /* TODO */
261 printf("target device_add failed, error %d\n", retval);
262 return retval;
263 }
264
265 retval = driver->bind(&dev->gadget);
266 if (retval) {
267 debug_cond(DEBUG_SETUP != 0,
268 "%s: bind to driver --> error %d\n",
269 dev->gadget.name, retval);
270 dev->driver = 0;
271 return retval;
272 }
273
274 enable_irq(IRQ_OTG);
275
276 debug_cond(DEBUG_SETUP != 0,
277 "Registered gadget driver %s\n", dev->gadget.name);
278 udc_enable(dev);
279
280 return 0;
281 }
282
283 /*
284 * Unregister entry point for the peripheral controller driver.
285 */
usb_gadget_unregister_driver(struct usb_gadget_driver * driver)286 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
287 {
288 struct dwc2_udc *dev = the_controller;
289 unsigned long flags = 0;
290
291 if (!dev)
292 return -ENODEV;
293 if (!driver || driver != dev->driver)
294 return -EINVAL;
295
296 spin_lock_irqsave(&dev->lock, flags);
297 dev->driver = 0;
298 stop_activity(dev, driver);
299 spin_unlock_irqrestore(&dev->lock, flags);
300
301 driver->unbind(&dev->gadget);
302
303 disable_irq(IRQ_OTG);
304
305 udc_disable(dev);
306 return 0;
307 }
308 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
309
dwc2_gadget_start(struct usb_gadget * g,struct usb_gadget_driver * driver)310 static int dwc2_gadget_start(struct usb_gadget *g,
311 struct usb_gadget_driver *driver)
312 {
313 struct dwc2_udc *dev = the_controller;
314
315 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
316
317 if (!driver ||
318 (driver->speed != USB_SPEED_FULL &&
319 driver->speed != USB_SPEED_HIGH) ||
320 !driver->bind || !driver->disconnect || !driver->setup)
321 return -EINVAL;
322
323 if (!dev)
324 return -ENODEV;
325
326 if (dev->driver)
327 return -EBUSY;
328
329 /* first hook up the driver ... */
330 dev->driver = driver;
331
332 debug_cond(DEBUG_SETUP != 0,
333 "Registered gadget driver %s\n", dev->gadget.name);
334 return udc_enable(dev);
335 }
336
dwc2_gadget_stop(struct usb_gadget * g)337 static int dwc2_gadget_stop(struct usb_gadget *g)
338 {
339 struct dwc2_udc *dev = the_controller;
340
341 if (!dev)
342 return -ENODEV;
343
344 if (!dev->driver)
345 return -EINVAL;
346
347 dev->driver = 0;
348 stop_activity(dev, dev->driver);
349
350 udc_disable(dev);
351
352 return 0;
353 }
354
355 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
356
357 /*
358 * done - retire a request; caller blocked irqs
359 */
done(struct dwc2_ep * ep,struct dwc2_request * req,int status)360 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
361 {
362 unsigned int stopped = ep->stopped;
363
364 debug("%s: %s %p, req = %p, stopped = %d\n",
365 __func__, ep->ep.name, ep, &req->req, stopped);
366
367 list_del_init(&req->queue);
368
369 if (likely(req->req.status == -EINPROGRESS))
370 req->req.status = status;
371 else
372 status = req->req.status;
373
374 if (status && status != -ESHUTDOWN) {
375 debug("complete %s req %p stat %d len %u/%u\n",
376 ep->ep.name, &req->req, status,
377 req->req.actual, req->req.length);
378 }
379
380 /* don't modify queue heads during completion callback */
381 ep->stopped = 1;
382
383 #ifdef DEBUG
384 printf("calling complete callback\n");
385 {
386 int i, len = req->req.length;
387
388 printf("pkt[%d] = ", req->req.length);
389 if (len > 64)
390 len = 64;
391 for (i = 0; i < len; i++) {
392 printf("%02x", ((u8 *)req->req.buf)[i]);
393 if ((i & 7) == 7)
394 printf(" ");
395 }
396 printf("\n");
397 }
398 #endif
399 spin_unlock(&ep->dev->lock);
400 req->req.complete(&ep->ep, &req->req);
401 spin_lock(&ep->dev->lock);
402
403 debug("callback completed\n");
404
405 ep->stopped = stopped;
406 }
407
408 /*
409 * nuke - dequeue ALL requests
410 */
nuke(struct dwc2_ep * ep,int status)411 static void nuke(struct dwc2_ep *ep, int status)
412 {
413 struct dwc2_request *req;
414
415 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
416
417 /* called with irqs blocked */
418 while (!list_empty(&ep->queue)) {
419 req = list_entry(ep->queue.next, struct dwc2_request, queue);
420 done(ep, req, status);
421 }
422 }
423
stop_activity(struct dwc2_udc * dev,struct usb_gadget_driver * driver)424 static void stop_activity(struct dwc2_udc *dev,
425 struct usb_gadget_driver *driver)
426 {
427 int i;
428
429 /* don't disconnect drivers more than once */
430 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
431 driver = 0;
432 dev->gadget.speed = USB_SPEED_UNKNOWN;
433
434 /* prevent new request submissions, kill any outstanding requests */
435 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
436 struct dwc2_ep *ep = &dev->ep[i];
437 ep->stopped = 1;
438 nuke(ep, -ESHUTDOWN);
439 }
440
441 /* report disconnect; the driver is already quiesced */
442 if (driver) {
443 spin_unlock(&dev->lock);
444 driver->disconnect(&dev->gadget);
445 spin_lock(&dev->lock);
446 }
447
448 /* re-init driver-visible data structures */
449 udc_reinit(dev);
450 }
451
reconfig_usbd(struct dwc2_udc * dev)452 static void reconfig_usbd(struct dwc2_udc *dev)
453 {
454 /* 2. Soft-reset OTG Core and then unreset again. */
455 int i;
456 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
457 uint32_t dflt_gusbcfg;
458 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
459 u32 max_hw_ep;
460 int pdata_hw_ep;
461
462 debug("Reseting OTG controller\n");
463
464 dflt_gusbcfg =
465 0<<15 /* PHY Low Power Clock sel*/
466 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
467 |0x5<<10 /* Turnaround time*/
468 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
469 /* 1:SRP enable] H1= 1,1*/
470 |0<<7 /* Ulpi DDR sel*/
471 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
472 |0<<4 /* 0: utmi+, 1:ulpi*/
473 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
474 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
475 #else
476 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
477 #endif
478 |0x7<<0; /* HS/FS Timeout**/
479
480 if (dev->pdata->usb_gusbcfg)
481 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
482
483 writel(dflt_gusbcfg, ®->gusbcfg);
484
485 /* 3. Put the OTG device core in the disconnected state.*/
486 uTemp = readl(®->dctl);
487 uTemp |= SOFT_DISCONNECT;
488 writel(uTemp, ®->dctl);
489
490 udelay(20);
491
492 /* 4. Make the OTG device core exit from the disconnected state.*/
493 uTemp = readl(®->dctl);
494 uTemp = uTemp & ~SOFT_DISCONNECT;
495 writel(uTemp, ®->dctl);
496
497 /* 5. Configure OTG Core to initial settings of device mode.*/
498 /* [][1: full speed(30Mhz) 0:high speed]*/
499 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
500
501 mdelay(1);
502
503 /* 6. Unmask the core interrupts*/
504 writel(GINTMSK_INIT, ®->gintmsk);
505
506 /* 7. Set NAK bit of EP0, EP1, EP2*/
507 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
508 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
509
510 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
511 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
512 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
513 }
514
515 /* 8. Unmask EPO interrupts*/
516 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
517 | (1 << EP0_CON), ®->daintmsk);
518
519 /* 9. Unmask device OUT EP common interrupts*/
520 writel(DOEPMSK_INIT, ®->doepmsk);
521
522 /* 10. Unmask device IN EP common interrupts*/
523 writel(DIEPMSK_INIT, ®->diepmsk);
524
525 rx_fifo_sz = RX_FIFO_SIZE;
526 np_tx_fifo_sz = NPTX_FIFO_SIZE;
527 tx_fifo_sz = PTX_FIFO_SIZE;
528
529 if (dev->pdata->rx_fifo_sz)
530 rx_fifo_sz = dev->pdata->rx_fifo_sz;
531 if (dev->pdata->np_tx_fifo_sz)
532 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
533 if (dev->pdata->tx_fifo_sz)
534 tx_fifo_sz = dev->pdata->tx_fifo_sz;
535
536 /* 11. Set Rx FIFO Size (in 32-bit words) */
537 writel(rx_fifo_sz, ®->grxfsiz);
538
539 /* 12. Set Non Periodic Tx FIFO Size */
540 writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
541 ®->gnptxfsiz);
542
543 /* retrieve the number of IN Endpoints (excluding ep0) */
544 max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
545 GHWCFG4_NUM_IN_EPS_SHIFT;
546 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
547
548 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
549 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
550 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
551 max_hw_ep, pdata_hw_ep);
552
553 for (i = 0; i < max_hw_ep; i++) {
554 if (pdata_hw_ep)
555 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
556
557 writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
558 tx_fifo_sz << 16, ®->dieptxf[i]);
559 }
560 /* Flush the RX FIFO */
561 writel(RX_FIFO_FLUSH, ®->grstctl);
562 while (readl(®->grstctl) & RX_FIFO_FLUSH)
563 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
564
565 /* Flush all the Tx FIFO's */
566 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
567 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
568 while (readl(®->grstctl) & TX_FIFO_FLUSH)
569 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
570
571 /* 13. Clear NAK bit of EP0, EP1, EP2*/
572 /* For Slave mode*/
573 /* EP0: Control OUT */
574 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
575 ®->out_endp[EP0_CON].doepctl);
576
577 /* 14. Initialize OTG Link Core.*/
578 writel(GAHBCFG_INIT, ®->gahbcfg);
579 }
580
set_max_pktsize(struct dwc2_udc * dev,enum usb_device_speed speed)581 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
582 {
583 unsigned int ep_ctrl;
584 int i;
585
586 if (speed == USB_SPEED_HIGH) {
587 ep0_fifo_size = 64;
588 ep_fifo_size = 512;
589 ep_fifo_size2 = 1024;
590 dev->gadget.speed = USB_SPEED_HIGH;
591 } else {
592 ep0_fifo_size = 64;
593 ep_fifo_size = 64;
594 ep_fifo_size2 = 64;
595 dev->gadget.speed = USB_SPEED_FULL;
596 }
597
598 dev->ep[0].ep.maxpacket = ep0_fifo_size;
599 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
600 dev->ep[i].ep.maxpacket = ep_fifo_size;
601
602 /* EP0 - Control IN (64 bytes)*/
603 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
604 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
605
606 /* EP0 - Control OUT (64 bytes)*/
607 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
608 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
609 }
610
dwc2_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)611 static int dwc2_ep_enable(struct usb_ep *_ep,
612 const struct usb_endpoint_descriptor *desc)
613 {
614 struct dwc2_ep *ep;
615 struct dwc2_udc *dev;
616 unsigned long flags = 0;
617
618 debug("%s: %p\n", __func__, _ep);
619
620 ep = container_of(_ep, struct dwc2_ep, ep);
621 if (!_ep || !desc || ep->desc || _ep->name == ep0name
622 || desc->bDescriptorType != USB_DT_ENDPOINT
623 || ep->bEndpointAddress != desc->bEndpointAddress
624 || ep_maxpacket(ep) <
625 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
626
627 debug("%s: bad ep or descriptor\n", __func__);
628 return -EINVAL;
629 }
630
631 /* xfer types must match, except that interrupt ~= bulk */
632 if (ep->bmAttributes != desc->bmAttributes
633 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
634 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
635
636 debug("%s: %s type mismatch\n", __func__, _ep->name);
637 return -EINVAL;
638 }
639
640 /* hardware _could_ do smaller, but driver doesn't */
641 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
642 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
643 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
644
645 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
646 return -ERANGE;
647 }
648
649 dev = ep->dev;
650 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
651
652 debug("%s: bogus device state\n", __func__);
653 return -ESHUTDOWN;
654 }
655
656 ep->stopped = 0;
657 ep->desc = desc;
658 ep->pio_irqs = 0;
659 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
660
661 /* Reset halt state */
662 dwc2_udc_set_nak(ep);
663 dwc2_udc_set_halt(_ep, 0);
664
665 spin_lock_irqsave(&ep->dev->lock, flags);
666 dwc2_udc_ep_activate(ep);
667 spin_unlock_irqrestore(&ep->dev->lock, flags);
668
669 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
670 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
671 return 0;
672 }
673
674 /*
675 * Disable EP
676 */
dwc2_ep_disable(struct usb_ep * _ep)677 static int dwc2_ep_disable(struct usb_ep *_ep)
678 {
679 struct dwc2_ep *ep;
680 unsigned long flags = 0;
681
682 debug("%s: %p\n", __func__, _ep);
683
684 ep = container_of(_ep, struct dwc2_ep, ep);
685 if (!_ep || !ep->desc) {
686 debug("%s: %s not enabled\n", __func__,
687 _ep ? ep->ep.name : NULL);
688 return -EINVAL;
689 }
690
691 spin_lock_irqsave(&ep->dev->lock, flags);
692
693 /* Nuke all pending requests */
694 nuke(ep, -ESHUTDOWN);
695
696 ep->desc = 0;
697 ep->stopped = 1;
698
699 spin_unlock_irqrestore(&ep->dev->lock, flags);
700
701 debug("%s: disabled %s\n", __func__, _ep->name);
702 return 0;
703 }
704
dwc2_alloc_request(struct usb_ep * ep,gfp_t gfp_flags)705 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
706 gfp_t gfp_flags)
707 {
708 struct dwc2_request *req;
709
710 debug("%s: %s %p\n", __func__, ep->name, ep);
711
712 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
713 if (!req)
714 return 0;
715
716 memset(req, 0, sizeof *req);
717 INIT_LIST_HEAD(&req->queue);
718
719 return &req->req;
720 }
721
dwc2_free_request(struct usb_ep * ep,struct usb_request * _req)722 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
723 {
724 struct dwc2_request *req;
725
726 debug("%s: %p\n", __func__, ep);
727
728 req = container_of(_req, struct dwc2_request, req);
729 WARN_ON(!list_empty(&req->queue));
730 kfree(req);
731 }
732
733 /* dequeue JUST ONE request */
dwc2_dequeue(struct usb_ep * _ep,struct usb_request * _req)734 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
735 {
736 struct dwc2_ep *ep;
737 struct dwc2_request *req;
738 unsigned long flags = 0;
739
740 debug("%s: %p\n", __func__, _ep);
741
742 ep = container_of(_ep, struct dwc2_ep, ep);
743 if (!_ep || ep->ep.name == ep0name)
744 return -EINVAL;
745
746 spin_lock_irqsave(&ep->dev->lock, flags);
747
748 /* make sure it's actually queued on this endpoint */
749 list_for_each_entry(req, &ep->queue, queue) {
750 if (&req->req == _req)
751 break;
752 }
753 if (&req->req != _req) {
754 spin_unlock_irqrestore(&ep->dev->lock, flags);
755 return -EINVAL;
756 }
757
758 done(ep, req, -ECONNRESET);
759
760 spin_unlock_irqrestore(&ep->dev->lock, flags);
761 return 0;
762 }
763
764 /*
765 * Return bytes in EP FIFO
766 */
dwc2_fifo_status(struct usb_ep * _ep)767 static int dwc2_fifo_status(struct usb_ep *_ep)
768 {
769 int count = 0;
770 struct dwc2_ep *ep;
771
772 ep = container_of(_ep, struct dwc2_ep, ep);
773 if (!_ep) {
774 debug("%s: bad ep\n", __func__);
775 return -ENODEV;
776 }
777
778 debug("%s: %d\n", __func__, ep_index(ep));
779
780 /* LPD can't report unclaimed bytes from IN fifos */
781 if (ep_is_in(ep))
782 return -EOPNOTSUPP;
783
784 return count;
785 }
786
787 /*
788 * Flush EP FIFO
789 */
dwc2_fifo_flush(struct usb_ep * _ep)790 static void dwc2_fifo_flush(struct usb_ep *_ep)
791 {
792 struct dwc2_ep *ep;
793
794 ep = container_of(_ep, struct dwc2_ep, ep);
795 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
796 debug("%s: bad ep\n", __func__);
797 return;
798 }
799
800 debug("%s: %d\n", __func__, ep_index(ep));
801 }
802
803 static const struct usb_gadget_ops dwc2_udc_ops = {
804 /* current versions must always be self-powered */
805 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
806 .udc_start = dwc2_gadget_start,
807 .udc_stop = dwc2_gadget_stop,
808 #endif
809 };
810
811 static struct dwc2_udc memory = {
812 .usb_address = 0,
813 .gadget = {
814 .ops = &dwc2_udc_ops,
815 .ep0 = &memory.ep[0].ep,
816 .name = driver_name,
817 },
818
819 /* control endpoint */
820 .ep[0] = {
821 .ep = {
822 .name = ep0name,
823 .ops = &dwc2_ep_ops,
824 .maxpacket = EP0_FIFO_SIZE,
825 },
826 .dev = &memory,
827
828 .bEndpointAddress = 0,
829 .bmAttributes = 0,
830
831 .ep_type = ep_control,
832 },
833
834 /* first group of endpoints */
835 .ep[1] = {
836 .ep = {
837 .name = "ep1in-bulk",
838 .ops = &dwc2_ep_ops,
839 .maxpacket = EP_FIFO_SIZE,
840 },
841 .dev = &memory,
842
843 .bEndpointAddress = USB_DIR_IN | 1,
844 .bmAttributes = USB_ENDPOINT_XFER_BULK,
845
846 .ep_type = ep_bulk_out,
847 .fifo_num = 1,
848 },
849
850 .ep[2] = {
851 .ep = {
852 .name = "ep2out-bulk",
853 .ops = &dwc2_ep_ops,
854 .maxpacket = EP_FIFO_SIZE,
855 },
856 .dev = &memory,
857
858 .bEndpointAddress = USB_DIR_OUT | 2,
859 .bmAttributes = USB_ENDPOINT_XFER_BULK,
860
861 .ep_type = ep_bulk_in,
862 .fifo_num = 2,
863 },
864
865 .ep[3] = {
866 .ep = {
867 .name = "ep3in-int",
868 .ops = &dwc2_ep_ops,
869 .maxpacket = EP_FIFO_SIZE,
870 },
871 .dev = &memory,
872
873 .bEndpointAddress = USB_DIR_IN | 3,
874 .bmAttributes = USB_ENDPOINT_XFER_INT,
875
876 .ep_type = ep_interrupt,
877 .fifo_num = 3,
878 },
879 };
880
881 /*
882 * probe - binds to the platform device
883 */
884
dwc2_udc_probe(struct dwc2_plat_otg_data * pdata)885 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
886 {
887 struct dwc2_udc *dev = &memory;
888 int retval = 0;
889
890 debug("%s: %p\n", __func__, pdata);
891
892 dev->pdata = pdata;
893
894 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
895
896 dev->gadget.is_dualspeed = 1; /* Hack only*/
897 dev->gadget.is_otg = 0;
898 dev->gadget.is_a_peripheral = 0;
899 dev->gadget.b_hnp_enable = 0;
900 dev->gadget.a_hnp_support = 0;
901 dev->gadget.a_alt_hnp_support = 0;
902
903 the_controller = dev;
904
905 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
906 ROUND(sizeof(struct usb_ctrlrequest),
907 CONFIG_SYS_CACHELINE_SIZE));
908 if (!usb_ctrl) {
909 pr_err("No memory available for UDC!\n");
910 return -ENOMEM;
911 }
912
913 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
914
915 udc_reinit(dev);
916
917 return retval;
918 }
919
dwc2_udc_handle_interrupt(void)920 int dwc2_udc_handle_interrupt(void)
921 {
922 u32 intr_status = readl(®->gintsts);
923 u32 gintmsk = readl(®->gintmsk);
924
925 if (intr_status & gintmsk)
926 return dwc2_udc_irq(1, (void *)the_controller);
927
928 return 0;
929 }
930
931 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
932
usb_gadget_handle_interrupts(int index)933 int usb_gadget_handle_interrupts(int index)
934 {
935 return dwc2_udc_handle_interrupt();
936 }
937
938 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
939
940 struct dwc2_priv_data {
941 struct clk_bulk clks;
942 struct reset_ctl_bulk resets;
943 struct phy *phys;
944 int num_phys;
945 struct udevice *usb33d_supply;
946 };
947
dm_usb_gadget_handle_interrupts(struct udevice * dev)948 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
949 {
950 return dwc2_udc_handle_interrupt();
951 }
952
dwc2_phy_setup(struct udevice * dev,struct phy ** array,int * num_phys)953 int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
954 {
955 int i, ret, count;
956 struct phy *usb_phys;
957
958 /* Return if no phy declared */
959 if (!dev_read_prop(dev, "phys", NULL))
960 return 0;
961
962 count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
963 if (count <= 0)
964 return count;
965
966 usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
967 GFP_KERNEL);
968 if (!usb_phys)
969 return -ENOMEM;
970
971 for (i = 0; i < count; i++) {
972 ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
973 if (ret && ret != -ENOENT) {
974 dev_err(dev, "Failed to get USB PHY%d for %s\n",
975 i, dev->name);
976 return ret;
977 }
978 }
979
980 for (i = 0; i < count; i++) {
981 ret = generic_phy_init(&usb_phys[i]);
982 if (ret) {
983 dev_err(dev, "Can't init USB PHY%d for %s\n",
984 i, dev->name);
985 goto phys_init_err;
986 }
987 }
988
989 for (i = 0; i < count; i++) {
990 ret = generic_phy_power_on(&usb_phys[i]);
991 if (ret) {
992 dev_err(dev, "Can't power USB PHY%d for %s\n",
993 i, dev->name);
994 goto phys_poweron_err;
995 }
996 }
997
998 *array = usb_phys;
999 *num_phys = count;
1000
1001 return 0;
1002
1003 phys_poweron_err:
1004 for (i = count - 1; i >= 0; i--)
1005 generic_phy_power_off(&usb_phys[i]);
1006
1007 for (i = 0; i < count; i++)
1008 generic_phy_exit(&usb_phys[i]);
1009
1010 return ret;
1011
1012 phys_init_err:
1013 for (; i >= 0; i--)
1014 generic_phy_exit(&usb_phys[i]);
1015
1016 return ret;
1017 }
1018
dwc2_phy_shutdown(struct udevice * dev,struct phy * usb_phys,int num_phys)1019 void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
1020 {
1021 int i, ret;
1022
1023 for (i = 0; i < num_phys; i++) {
1024 if (!generic_phy_valid(&usb_phys[i]))
1025 continue;
1026
1027 ret = generic_phy_power_off(&usb_phys[i]);
1028 ret |= generic_phy_exit(&usb_phys[i]);
1029 if (ret) {
1030 dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
1031 i, dev->name);
1032 }
1033 }
1034 }
1035
dwc2_udc_otg_ofdata_to_platdata(struct udevice * dev)1036 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
1037 {
1038 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1039 int node = dev_of_offset(dev);
1040 ulong drvdata;
1041 void (*set_params)(struct dwc2_plat_otg_data *data);
1042 int ret;
1043
1044 if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL &&
1045 usb_get_dr_mode(node) != USB_DR_MODE_OTG) {
1046 dev_dbg(dev, "Invalid mode\n");
1047 return -ENODEV;
1048 }
1049
1050 platdata->regs_otg = dev_read_addr(dev);
1051
1052 platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
1053 platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
1054 "g-np-tx-fifo-size", 0);
1055
1056 platdata->tx_fifo_sz_nb =
1057 dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
1058 if (platdata->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1059 platdata->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1060 if (platdata->tx_fifo_sz_nb) {
1061 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1062 platdata->tx_fifo_sz_array,
1063 platdata->tx_fifo_sz_nb);
1064 if (ret)
1065 return ret;
1066 }
1067
1068 platdata->force_b_session_valid =
1069 dev_read_bool(dev, "u-boot,force-b-session-valid");
1070
1071 /* force platdata according compatible */
1072 drvdata = dev_get_driver_data(dev);
1073 if (drvdata) {
1074 set_params = (void *)drvdata;
1075 set_params(platdata);
1076 }
1077
1078 return 0;
1079 }
1080
dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data * p)1081 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1082 {
1083 p->activate_stm_id_vb_detection = true;
1084 p->usb_gusbcfg =
1085 0 << 15 /* PHY Low Power Clock sel*/
1086 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1087 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1088 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1089 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1090 | 0x7 << 0; /* FS timeout calibration**/
1091
1092 if (p->force_b_session_valid)
1093 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1094 }
1095
dwc2_udc_otg_reset_init(struct udevice * dev,struct reset_ctl_bulk * resets)1096 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1097 struct reset_ctl_bulk *resets)
1098 {
1099 int ret;
1100
1101 ret = reset_get_bulk(dev, resets);
1102 if (ret == -ENOTSUPP)
1103 return 0;
1104
1105 if (ret)
1106 return ret;
1107
1108 ret = reset_assert_bulk(resets);
1109
1110 if (!ret) {
1111 udelay(2);
1112 ret = reset_deassert_bulk(resets);
1113 }
1114 if (ret) {
1115 reset_release_bulk(resets);
1116 return ret;
1117 }
1118
1119 return 0;
1120 }
1121
dwc2_udc_otg_clk_init(struct udevice * dev,struct clk_bulk * clks)1122 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1123 struct clk_bulk *clks)
1124 {
1125 int ret;
1126
1127 ret = clk_get_bulk(dev, clks);
1128 if (ret == -ENOSYS)
1129 return 0;
1130
1131 if (ret)
1132 return ret;
1133
1134 ret = clk_enable_bulk(clks);
1135 if (ret) {
1136 clk_release_bulk(clks);
1137 return ret;
1138 }
1139
1140 return 0;
1141 }
1142
dwc2_udc_otg_probe(struct udevice * dev)1143 static int dwc2_udc_otg_probe(struct udevice *dev)
1144 {
1145 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1146 struct dwc2_priv_data *priv = dev_get_priv(dev);
1147 struct dwc2_usbotg_reg *usbotg_reg =
1148 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1149 int ret;
1150
1151 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1152 if (ret)
1153 return ret;
1154
1155 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1156 if (ret)
1157 return ret;
1158
1159 ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
1160 if (ret)
1161 return ret;
1162
1163 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1164 platdata->activate_stm_id_vb_detection &&
1165 !platdata->force_b_session_valid) {
1166 ret = device_get_supply_regulator(dev, "usb33d-supply",
1167 &priv->usb33d_supply);
1168 if (ret) {
1169 dev_err(dev, "can't get voltage level detector supply\n");
1170 return ret;
1171 }
1172 ret = regulator_set_enable(priv->usb33d_supply, true);
1173 if (ret) {
1174 dev_err(dev, "can't enable voltage level detector supply\n");
1175 return ret;
1176 }
1177 /* Enable vbus sensing */
1178 setbits_le32(&usbotg_reg->ggpio,
1179 GGPIO_STM32_OTG_GCCFG_VBDEN |
1180 GGPIO_STM32_OTG_GCCFG_IDEN);
1181 }
1182
1183 if (platdata->force_b_session_valid)
1184 /* Override B session bits : value and enable */
1185 setbits_le32(&usbotg_reg->gotgctl,
1186 A_VALOEN | A_VALOVAL | B_VALOEN | B_VALOVAL);
1187
1188 ret = dwc2_udc_probe(platdata);
1189 if (ret)
1190 return ret;
1191
1192 the_controller->driver = 0;
1193
1194 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1195
1196 return ret;
1197 }
1198
dwc2_udc_otg_remove(struct udevice * dev)1199 static int dwc2_udc_otg_remove(struct udevice *dev)
1200 {
1201 struct dwc2_priv_data *priv = dev_get_priv(dev);
1202
1203 usb_del_gadget_udc(&the_controller->gadget);
1204
1205 reset_release_bulk(&priv->resets);
1206
1207 clk_release_bulk(&priv->clks);
1208
1209 dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
1210
1211 return dm_scan_fdt_dev(dev);
1212 }
1213
1214 static const struct udevice_id dwc2_udc_otg_ids[] = {
1215 { .compatible = "snps,dwc2" },
1216 { .compatible = "st,stm32mp1-hsotg",
1217 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1218 {},
1219 };
1220
1221 U_BOOT_DRIVER(dwc2_udc_otg) = {
1222 .name = "dwc2-udc-otg",
1223 .id = UCLASS_USB_GADGET_GENERIC,
1224 .of_match = dwc2_udc_otg_ids,
1225 .ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
1226 .probe = dwc2_udc_otg_probe,
1227 .remove = dwc2_udc_otg_remove,
1228 .platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
1229 .priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
1230 };
1231
dwc2_udc_B_session_valid(struct udevice * dev)1232 int dwc2_udc_B_session_valid(struct udevice *dev)
1233 {
1234 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1235 struct dwc2_usbotg_reg *usbotg_reg =
1236 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1237
1238 return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1239 }
1240 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1241