1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 Timesys Corporation 4 * Copyright (C) 2015 General Electric Company 5 * Copyright (C) 2014 Advantech 6 * Copyright (C) 2012 Freescale Semiconductor, Inc. 7 * 8 * Configuration settings for the GE MX6Q Bx50v3 boards. 9 */ 10 11 #ifndef __GE_BX50V3_CONFIG_H 12 #define __GE_BX50V3_CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 #include <asm/mach-imx/gpio.h> 16 17 #define CONFIG_BOARD_NAME "General Electric Bx50v3" 18 19 #define CONFIG_MXC_UART_BASE UART3_BASE 20 #define CONSOLE_DEV "ttymxc2" 21 22 #include "mx6_common.h" 23 #include <linux/sizes.h> 24 25 #define CONFIG_CMDLINE_TAG 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 #define CONFIG_REVISION_TAG 29 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 30 31 #define CONFIG_MXC_UART 32 33 /* SATA Configs */ 34 #ifdef CONFIG_CMD_SATA 35 #define CONFIG_SYS_SATA_MAX_DEVICE 1 36 #define CONFIG_DWC_AHSATA_PORT_ID 0 37 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 38 #define CONFIG_LBA48 39 #endif 40 41 /* USB Configs */ 42 #ifdef CONFIG_USB 43 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 44 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 45 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 46 #define CONFIG_MXC_USB_FLAGS 0 47 48 #define CONFIG_USBD_HS 49 #define CONFIG_USB_GADGET_MASS_STORAGE 50 #endif 51 52 /* Networking Configs */ 53 #ifdef CONFIG_NET 54 #define CONFIG_FEC_MXC 55 #define IMX_FEC_BASE ENET_BASE_ADDR 56 #define CONFIG_FEC_XCV_TYPE RGMII 57 #define CONFIG_ETHPRIME "FEC" 58 #define CONFIG_FEC_MXC_PHYADDR 4 59 #define CONFIG_PHY_ATHEROS 60 #endif 61 62 /* Serial Flash */ 63 64 /* allow to overwrite serial and ethaddr */ 65 #define CONFIG_ENV_OVERWRITE 66 67 #define CONFIG_LOADADDR 0x12000000 68 69 #ifdef CONFIG_NFS_CMD 70 #define NETWORKBOOT \ 71 "setnetworkboot=" \ 72 "setenv ipaddr 172.16.2.10; setenv serverip 172.16.2.20; " \ 73 "setenv gatewayip 172.16.2.20; setenv nfsserver 172.16.2.20; " \ 74 "setenv netmask 255.255.255.0; setenv ethaddr ca:fe:de:ca:f0:11; " \ 75 "setenv bootargs root=/dev/nfs nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \ 76 "setenv bootargs $bootargs ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \ 77 "setenv bootargs $bootargs cma=128M bootcause=POR console=${console} ${videoargs} " \ 78 "setenv bootargs $bootargs systemd.mask=helix-network-defaults.service " \ 79 "setenv bootargs $bootargs watchdog.handle_boot_enabled=1\0" \ 80 "networkboot=" \ 81 "run setnetworkboot; " \ 82 "nfs ${loadaddr} /srv/nfs/fitImage; " \ 83 "bootm ${loadaddr}#conf@${confidx}\0" \ 84 85 #define CONFIG_NETWORKBOOTCOMMAND \ 86 "run networkboot; " \ 87 88 #else 89 #define NETWORKBOOT \ 90 91 #endif 92 93 #define CONFIG_EXTRA_ENV_SETTINGS \ 94 NETWORKBOOT \ 95 "bootcause=POR\0" \ 96 "image=/boot/fitImage\0" \ 97 "fdt_high=0xffffffff\0" \ 98 "dev=mmc\0" \ 99 "devnum=2\0" \ 100 "rootdev=mmcblk0p\0" \ 101 "quiet=quiet loglevel=0\0" \ 102 "console=" CONSOLE_DEV "\0" \ 103 "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \ 104 "ro rootwait cma=128M " \ 105 "bootcause=${bootcause} " \ 106 "${quiet} console=${console} ${rtc_status} " \ 107 "${videoargs}" "\0" \ 108 "doquiet=" \ 109 "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ 110 "then setenv quiet; fi\0" \ 111 "hasfirstboot=" \ 112 "ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ 113 "/boot/bootcause/firstboot\0" \ 114 "swappartitions=" \ 115 "setexpr partnum 3 - ${partnum}\0" \ 116 "failbootcmd=" \ 117 "bx50_backlight_enable; " \ 118 "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \ 119 "echo $msg; " \ 120 "setenv stdout vga; " \ 121 "echo \"\n\n\n\n \" $msg; " \ 122 "setenv stdout serial; " \ 123 "mw.b 0x7000A000 0xbc; " \ 124 "mw.b 0x7000A001 0x00; " \ 125 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ 126 "altbootcmd=" \ 127 "run doquiet; " \ 128 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 129 "run hasfirstboot || setenv partnum 0; " \ 130 "if test ${partnum} != 0; then " \ 131 "setenv bootcause REVERT; " \ 132 "run swappartitions loadimage doboot; " \ 133 "fi; " \ 134 "run failbootcmd\0" \ 135 "loadimage=" \ 136 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 137 "doboot=" \ 138 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 139 "run setargs; " \ 140 "bootm ${loadaddr}#conf@${confidx}\0" \ 141 "tryboot=" \ 142 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ 143 "run loadimage || run swappartitions && run loadimage || " \ 144 "setenv partnum 0 && echo MISSING IMAGE;" \ 145 "run doboot; " \ 146 "run failbootcmd\0" \ 147 148 #define CONFIG_MMCBOOTCOMMAND \ 149 "if mmc dev ${devnum}; then " \ 150 "run doquiet; " \ 151 "run tryboot; " \ 152 "fi; " \ 153 154 #define CONFIG_USBBOOTCOMMAND \ 155 "echo Unsupported; " \ 156 157 #ifdef CONFIG_NFS_CMD 158 #define CONFIG_BOOTCOMMAND CONFIG_NETWORKBOOTCOMMAND 159 #elif CONFIG_CMD_USB 160 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND 161 #else 162 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND 163 #endif 164 165 166 /* Miscellaneous configurable options */ 167 168 #define CONFIG_SYS_MEMTEST_START 0x10000000 169 #define CONFIG_SYS_MEMTEST_END 0x10010000 170 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 171 172 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 173 174 /* Physical Memory Map */ 175 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 176 177 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 178 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 179 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 180 181 #define CONFIG_SYS_INIT_SP_OFFSET \ 182 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 183 #define CONFIG_SYS_INIT_SP_ADDR \ 184 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 185 186 /* environment organization */ 187 188 #define CONFIG_SYS_FSL_USDHC_NUM 3 189 190 /* Framebuffer */ 191 #define CONFIG_HIDE_LOGO_VERSION 192 #define CONFIG_IMX_HDMI 193 #define CONFIG_IMX_VIDEO_SKIP 194 #define CONFIG_CMD_BMP 195 196 #define CONFIG_IMX6_PWM_PER_CLK 66000000 197 198 #define CONFIG_PCI 199 #define CONFIG_PCI_PNP 200 #define CONFIG_PCI_SCAN_SHOW 201 #define CONFIG_PCIE_IMX 202 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 203 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 204 205 #define CONFIG_RTC_RX8010SJ 206 #define CONFIG_SYS_RTC_BUS_NUM 2 207 #define CONFIG_SYS_I2C_RTC_ADDR 0x32 208 209 /* I2C Configs */ 210 #define CONFIG_SYS_I2C 211 #define CONFIG_SYS_I2C_MXC 212 #define CONFIG_SYS_I2C_SPEED 100000 213 #define CONFIG_SYS_I2C_MXC_I2C1 214 #define CONFIG_SYS_I2C_MXC_I2C2 215 #define CONFIG_SYS_I2C_MXC_I2C3 216 217 #define CONFIG_SYS_NUM_I2C_BUSES 11 218 #define CONFIG_SYS_I2C_MAX_HOPS 1 219 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 220 {1, {I2C_NULL_HOP} }, \ 221 {2, {I2C_NULL_HOP} }, \ 222 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ 223 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 224 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 225 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 226 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 227 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 228 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ 229 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ 230 } 231 232 #define CONFIG_BCH 233 234 #endif /* __GE_BX50V3_CONFIG_H */ 235