1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2018 NXP 4 */ 5 6 #ifndef __IMX8MN_EVK_H 7 #define __IMX8MN_EVK_H 8 9 #include <linux/sizes.h> 10 #include <asm/arch/imx-regs.h> 11 12 #ifdef CONFIG_SECURE_BOOT 13 #define CONFIG_CSF_SIZE SZ_8K 14 #endif 15 16 #define CONFIG_SPL_MAX_SIZE (148 * 1024) 17 #define CONFIG_SYS_MONITOR_LEN SZ_512K 18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 20 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 21 #define CONFIG_SYS_UBOOT_BASE \ 22 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 23 24 #ifdef CONFIG_SPL_BUILD 25 #define CONFIG_SPL_STACK 0x95fff0 26 #define CONFIG_SPL_BSS_START_ADDR 0x00950000 27 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ 28 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 29 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ 30 #define CONFIG_SYS_ICACHE_OFF 31 #define CONFIG_SYS_DCACHE_OFF 32 33 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 34 #define CONFIG_MALLOC_F_ADDR 0x00940000 35 36 /* For RAW image gives a error info not panic */ 37 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 38 39 #endif 40 41 /* Initial environment variables */ 42 #define CONFIG_EXTRA_ENV_SETTINGS \ 43 "script=boot.scr\0" \ 44 "image=Image.itb\0" \ 45 "console=ttymxc1,115200\0" \ 46 "fdt_addr=0x43000000\0" \ 47 "fdt_high=0xffffffffffffffff\0" \ 48 "boot_fit=try\0" \ 49 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 50 "initrd_addr=0x43800000\0" \ 51 "initrd_high=0xffffffffffffffff\0" \ 52 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 53 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 54 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 55 "mmcautodetect=yes\0" \ 56 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 57 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 58 "bootscript=echo Running bootscript from mmc ...; " \ 59 "source\0" \ 60 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 61 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 62 "mmcboot=echo Booting from mmc ...; " \ 63 "run mmcargs; " \ 64 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 65 "bootm ${loadaddr}; " \ 66 "else " \ 67 "if run loadfdt; then " \ 68 "booti ${loadaddr} - ${fdt_addr}; " \ 69 "else " \ 70 "echo WARN: Cannot load the DT; " \ 71 "fi; " \ 72 "fi;\0" \ 73 "netargs=setenv bootargs console=${console} " \ 74 "root=/dev/nfs " \ 75 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 76 "netboot=echo Booting from net ...; " \ 77 "run netargs; " \ 78 "if test ${ip_dyn} = yes; then " \ 79 "setenv get_cmd dhcp; " \ 80 "else " \ 81 "setenv get_cmd tftp; " \ 82 "fi; " \ 83 "${get_cmd} ${loadaddr} ${image}; " \ 84 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 85 "bootm ${loadaddr}; " \ 86 "else " \ 87 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 88 "booti ${loadaddr} - ${fdt_addr}; " \ 89 "else " \ 90 "echo WARN: Cannot load the DT; " \ 91 "fi; " \ 92 "fi;\0" 93 94 #define CONFIG_BOOTCOMMAND \ 95 "mmc dev ${mmcdev}; if mmc rescan; then " \ 96 "if run loadbootscript; then " \ 97 "run bootscript; " \ 98 "else " \ 99 "if run loadimage; then " \ 100 "run mmcboot; " \ 101 "else run netboot; " \ 102 "fi; " \ 103 "fi; " \ 104 "fi;" 105 106 /* Link Definitions */ 107 #define CONFIG_LOADADDR 0x40480000 108 109 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 110 111 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 112 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 113 #define CONFIG_SYS_INIT_SP_OFFSET \ 114 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 115 #define CONFIG_SYS_INIT_SP_ADDR \ 116 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 117 118 #define CONFIG_ENV_OVERWRITE 119 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 120 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 121 122 /* Size of malloc() pool */ 123 #define CONFIG_SYS_MALLOC_LEN SZ_32M 124 125 #define CONFIG_SYS_SDRAM_BASE 0x40000000 126 #define PHYS_SDRAM 0x40000000 127 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 128 129 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 130 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) 131 132 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 133 134 /* Monitor Command Prompt */ 135 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 136 #define CONFIG_SYS_CBSIZE 2048 137 #define CONFIG_SYS_MAXARGS 64 138 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 140 sizeof(CONFIG_SYS_PROMPT) + 16) 141 142 /* USDHC */ 143 #define CONFIG_FSL_USDHC 144 145 #define CONFIG_SYS_FSL_USDHC_NUM 2 146 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 147 148 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 149 150 #define CONFIG_SYS_I2C_SPEED 100000 151 152 #endif 153