1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2017-2018 NXP 4 */ 5 6 #ifndef __IMX8QM_ROM7720_H 7 #define __IMX8QM_ROM7720_H 8 9 #include <linux/sizes.h> 10 #include <asm/arch/imx-regs.h> 11 #define CONFIG_REMAKE_ELF 12 13 #define CONFIG_SPL_MAX_SIZE (124 * 1024) 14 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 15 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ 16 17 #undef CONFIG_BOOTM_NETBSD 18 19 #define CONFIG_FSL_USDHC 20 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 21 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 22 23 #define CONFIG_ENV_OVERWRITE 24 25 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 26 /* FUSE command */ 27 #define CONFIG_CMD_FUSE 28 29 /* Boot M4 */ 30 #define M4_BOOT_ENV \ 31 "m4_0_image=m4_0.bin\0" \ 32 "m4_1_image=m4_1.bin\0" \ 33 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ 34 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ 35 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ 36 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ 37 38 #ifdef CONFIG_NAND_BOOT 39 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " 40 #else 41 #define MFG_NAND_PARTITION "" 42 #endif 43 44 #define CONFIG_MFG_ENV_SETTINGS \ 45 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 46 "rdinit=/linuxrc " \ 47 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 48 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 49 "g_mass_storage.iSerialNumber=\"\" "\ 50 MFG_NAND_PARTITION \ 51 "clk_ignore_unused "\ 52 "\0" \ 53 "initrd_addr=0x83800000\0" \ 54 "initrd_high=0xffffffffffffffff\0" \ 55 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 56 57 /* Initial environment variables */ 58 #define CONFIG_EXTRA_ENV_SETTINGS \ 59 CONFIG_MFG_ENV_SETTINGS \ 60 M4_BOOT_ENV \ 61 "script=boot.scr\0" \ 62 "image=Image\0" \ 63 "panel=NULL\0" \ 64 "console=ttyLP0\0" \ 65 "fdt_addr=0x83000000\0" \ 66 "fdt_high=0xffffffffffffffff\0" \ 67 "boot_fdt=try\0" \ 68 "fdt_file=imx8qm-rom7720-a1.dtb\0" \ 69 "initrd_addr=0x83800000\0" \ 70 "initrd_high=0xffffffffffffffff\0" \ 71 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 72 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 73 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 74 "mmcautodetect=yes\0" \ 75 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ 76 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 77 "bootscript=echo Running bootscript from mmc ...; " \ 78 "source\0" \ 79 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 80 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 81 "mmcboot=echo Booting from mmc ...; " \ 82 "run mmcargs; " \ 83 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 84 "if run loadfdt; then " \ 85 "booti ${loadaddr} - ${fdt_addr}; " \ 86 "else " \ 87 "echo WARN: Cannot load the DT; " \ 88 "fi; " \ 89 "else " \ 90 "echo wait for boot; " \ 91 "fi;\0" \ 92 "netargs=setenv bootargs console=${console},${baudrate} " \ 93 "root=/dev/nfs " \ 94 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ 95 "netboot=echo Booting from net ...; " \ 96 "run netargs; " \ 97 "if test ${ip_dyn} = yes; then " \ 98 "setenv get_cmd dhcp; " \ 99 "else " \ 100 "setenv get_cmd tftp; " \ 101 "fi; " \ 102 "${get_cmd} ${loadaddr} ${image}; " \ 103 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 104 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 105 "booti ${loadaddr} - ${fdt_addr}; " \ 106 "else " \ 107 "echo WARN: Cannot load the DT; " \ 108 "fi; " \ 109 "else " \ 110 "booti; " \ 111 "fi;\0" 112 113 #define CONFIG_BOOTCOMMAND \ 114 "mmc dev ${mmcdev}; if mmc rescan; then " \ 115 "if run loadbootscript; then " \ 116 "run bootscript; " \ 117 "else " \ 118 "if run loadimage; then " \ 119 "run mmcboot; " \ 120 "else run netboot; " \ 121 "fi; " \ 122 "fi; " \ 123 "else booti ${loadaddr} - ${fdt_addr}; fi" 124 125 /* Link Definitions */ 126 #define CONFIG_LOADADDR 0x80280000 127 128 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 129 130 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 131 132 /* Default environment is in SD */ 133 134 #ifdef CONFIG_QSPI_BOOT 135 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 136 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 137 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 138 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 139 #else 140 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 141 #endif 142 143 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 144 145 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, 146 * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, 147 * USDHC2 is for SD, USDHC3 is for SD on base board 148 */ 149 #define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC3 */ 150 #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ 151 #define CONFIG_SYS_FSL_USDHC_NUM 3 152 153 /* Size of malloc() pool */ 154 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) 155 156 #define CONFIG_SYS_SDRAM_BASE 0x80000000 157 #define PHYS_SDRAM_1 0x80000000 158 #define PHYS_SDRAM_2 0x880000000 159 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ 160 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ 161 #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ 162 163 #define CONFIG_SYS_MEMTEST_START 0xA0000000 164 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_1_SIZE >> 2)) 165 166 /* Serial */ 167 #define CONFIG_BAUDRATE 115200 168 169 /* Generic Timer Definitions */ 170 #define COUNTER_FREQUENCY 8000000 /* 8MHz */ 171 172 /* Networking */ 173 #define CONFIG_FEC_XCV_TYPE RGMII 174 #define FEC_QUIRK_ENET_MAC 175 176 #endif /* __IMX8QM_ROM7720_H */ 177