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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4  *
5  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6  *
7  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8  *
9  * Configuration for the MX35pdk Freescale board.
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #include <asm/arch/imx-regs.h>
16 
17  /* High Level Configuration Options */
18 #define CONFIG_MX35
19 
20 #define CONFIG_SYS_FSL_CLK
21 
22 /* Set TEXT at the beginning of the NOR flash */
23 
24 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
25 #define CONFIG_REVISION_TAG
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28 
29 /*
30  * Size of malloc() pool
31  */
32 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
33 
34 /*
35  * Hardware drivers
36  */
37 #define CONFIG_SYS_I2C
38 #define CONFIG_SYS_I2C_MXC
39 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
40 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
41 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
42 
43 /*
44  * PMIC Configs
45  */
46 #define CONFIG_POWER
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_FSL
49 #define CONFIG_POWER_FSL_MC13892
50 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
51 #define CONFIG_RTC_MC13XXX
52 
53 /*
54  * MFD MC9SDZ60
55  */
56 #define CONFIG_FSL_MC9SDZ60
57 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69
58 
59 /*
60  * UART (console)
61  */
62 #define CONFIG_MXC_UART
63 #define CONFIG_MXC_UART_BASE	UART1_BASE
64 
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 
68 /*
69  * Command definition
70  */
71 
72 #define CONFIG_NET_RETRY_COUNT	100
73 
74 
75 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
76 
77 /*
78  * Ethernet on the debug board (SMC911)
79  */
80 #define CONFIG_HAS_ETH1
81 #define CONFIG_ETHPRIME
82 
83 /*
84  * Ethernet on SOC (FEC)
85  */
86 #define CONFIG_FEC_MXC
87 #define IMX_FEC_BASE	FEC_BASE_ADDR
88 #define CONFIG_FEC_MXC_PHYADDR	0x1F
89 
90 #define CONFIG_ARP_TIMEOUT	200UL
91 
92 /*
93  * Miscellaneous configurable options
94  */
95 
96 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
97 #define CONFIG_SYS_MEMTEST_END		0x10000
98 
99 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
100 
101 /*
102  * Physical Memory Map
103  */
104 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
105 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
106 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
107 #define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)
108 
109 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
110 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
111 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
112 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
113 					GENERATED_GBL_DATA_SIZE)
114 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
115 					CONFIG_SYS_GBL_DATA_OFFSET)
116 
117 /*
118  * MTD Command for mtdparts
119  */
120 
121 /*
122  * FLASH and environment organization
123  */
124 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
125 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
126 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
127 /* Monitor at beginning of flash */
128 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
129 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
130 
131 /* Address and size of Redundant Environment Sector	*/
132 
133 /*
134  * CFI FLASH driver setup
135  */
136 
137 /* A non-standard buffered write algorithm */
138 #define CONFIG_FLASH_SPANSION_S29WS_N
139 
140 /*
141  * NAND FLASH driver setup
142  */
143 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
144 #define CONFIG_SYS_MAX_NAND_DEVICE	1
145 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
146 #define CONFIG_MXC_NAND_HWECC
147 #define CONFIG_SYS_NAND_LARGEPAGE
148 
149 /* EHCI driver */
150 #define CONFIG_EHCI_IS_TDI
151 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
152 #define CONFIG_USB_EHCI_MXC
153 #define CONFIG_MXC_USB_PORT	0
154 #define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERFACE_DIFF_UNI | \
155 				 MXC_EHCI_POWER_PINS_ENABLED | \
156 				 MXC_EHCI_OC_PIN_ACTIVE_LOW)
157 #define CONFIG_MXC_USB_PORTSC	(MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
158 
159 /* mmc driver */
160 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
161 #define CONFIG_SYS_FSL_ESDHC_NUM	1
162 
163 /*
164  * Default environment and default scripts
165  * to update uboot and load kernel
166  */
167 
168 #define CONFIG_HOSTNAME "mx35pdk"
169 #define	CONFIG_EXTRA_ENV_SETTINGS					\
170 	"netdev=eth1\0"							\
171 	"ethprime=smc911x\0"						\
172 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
173 		"nfsroot=${serverip}:${rootpath}\0"			\
174 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
175 	"addip_sta=setenv bootargs ${bootargs} "			\
176 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
177 		":${hostname}:${netdev}:off panic=1\0"			\
178 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
179 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
180 		"else run addip_sta;fi\0"				\
181 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
182 	"addtty=setenv bootargs ${bootargs}"				\
183 		" console=ttymxc0,${baudrate}\0"			\
184 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
185 	"loadaddr=80800000\0"						\
186 	"kernel_addr_r=80800000\0"					\
187 	"hostname=" CONFIG_HOSTNAME "\0"			\
188 	"bootfile=" CONFIG_HOSTNAME "/uImage\0"		\
189 	"ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0"	\
190 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
191 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
192 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
193 		"bootm ${kernel_addr}\0"				\
194 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
195 		"run nfsargs addip addtty addmtd addmisc;"		\
196 		"bootm ${kernel_addr_r}\0"				\
197 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
198 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
199 	"u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0"		\
200 	"load=tftp ${loadaddr} ${u-boot}\0"				\
201 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
202 	"update=protect off ${uboot_addr} +80000;"			\
203 		"erase ${uboot_addr} +80000;"				\
204 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
205 	"upd=if run load;then echo Updating u-boot;if run update;"	\
206 		"then echo U-Boot updated;"				\
207 			"else echo Error updating u-boot !;"		\
208 			"echo Board without bootloader !!;"		\
209 		"fi;"							\
210 		"else echo U-Boot not downloaded..exiting;fi\0"		\
211 	"bootcmd=run net_nfs\0"
212 
213 #endif				/* __CONFIG_H */
214