1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG 4 * Patrick Bruenn <p.bruenn@beckhoff.com> 5 * 6 * Configuration settings for Beckhoff CX9020. 7 * 8 * Based on Freescale's Linux i.MX mx53loco.h file: 9 * Copyright (C) 2010-2011 Freescale Semiconductor. 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 #define CONFIG_CMDLINE_TAG 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 25 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MXC_UART_BASE UART2_BASE 29 30 #define CONFIG_FPGA_COUNT 1 31 32 /* MMC Configs */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 #define CONFIG_SYS_FSL_ESDHC_NUM 2 35 36 /* bootz: zImage/initrd.img support */ 37 38 /* Eth Configs */ 39 #define IMX_FEC_BASE FEC_BASE_ADDR 40 #define CONFIG_ETHPRIME "FEC0" 41 #define CONFIG_FEC_MXC_PHYADDR 0x1F 42 43 /* USB Configs */ 44 #define CONFIG_MXC_USB_PORT 1 45 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 46 #define CONFIG_MXC_USB_FLAGS 0 47 48 /* allow to overwrite serial and ethaddr */ 49 #define CONFIG_ENV_OVERWRITE 50 51 /* Command definition */ 52 53 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ 54 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 "fdt_addr_r=0x71ff0000\0" \ 57 "pxefile_addr_r=0x73000000\0" \ 58 "ramdisk_addr_r=0x72000000\0" \ 59 "console=ttymxc1,115200\0" \ 60 "uenv=/boot/uEnv.txt\0" \ 61 "optargs=\0" \ 62 "cmdline=\0" \ 63 "mmcdev=0\0" \ 64 "mmcpart=1\0" \ 65 "mmcrootfstype=ext4 rootwait fixrtc\0" \ 66 "mmcargs=setenv bootargs console=${console} " \ 67 "${optargs} " \ 68 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \ 69 "rootfstype=${mmcrootfstype} " \ 70 "${cmdline}\0" \ 71 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 72 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \ 73 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \ 74 "setenv rdsize ${filesize}\0" \ 75 "loadfdt=echo loading ${fdt_path} ...;" \ 76 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \ 77 "mmcboot=mmc dev ${mmcdev}; " \ 78 "if mmc rescan; then " \ 79 "echo SD/MMC found on device ${mmcdev};" \ 80 "echo Checking for: ${uenv} ...;" \ 81 "setenv bootpart ${mmcdev}:${mmcpart};" \ 82 "if test -e mmc ${bootpart} ${uenv}; then " \ 83 "load mmc ${bootpart} ${loadaddr} ${uenv};" \ 84 "env import -t ${loadaddr} ${filesize};" \ 85 "echo Loaded environment from ${uenv};" \ 86 "if test -n ${dtb}; then " \ 87 "setenv fdt_file ${dtb};" \ 88 "echo Using: dtb=${fdt_file} ...;" \ 89 "fi;" \ 90 "echo Checking for uname_r in ${uenv}...;" \ 91 "if test -n ${uname_r}; then " \ 92 "echo Running uname_boot ...;" \ 93 "run uname_boot;" \ 94 "fi;" \ 95 "fi;" \ 96 "fi;\0" \ 97 "uname_boot="\ 98 "setenv bootdir /boot; " \ 99 "setenv bootfile vmlinuz-${uname_r}; " \ 100 "setenv ccatfile /boot/ccat.rbf; " \ 101 "echo loading CCAT firmware from ${ccatfile}; " \ 102 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \ 103 "fpga load 0 ${loadaddr} ${filesize}; " \ 104 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \ 105 "echo loading ${bootdir}/${bootfile} ...; " \ 106 "run loadimage;" \ 107 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \ 108 "if test -e mmc ${bootpart} ${fdt_path}; then " \ 109 "run loadfdt;" \ 110 "else " \ 111 "echo; echo unable to find ${fdt_file} ...;" \ 112 "echo booting legacy ...;"\ 113 "run mmcargs;" \ 114 "echo debug: [${bootargs}] ... ;" \ 115 "echo debug: [bootz ${loadaddr}] ... ;" \ 116 "bootz ${loadaddr}; " \ 117 "fi;" \ 118 "run mmcargs;" \ 119 "echo debug: [${bootargs}] ... ;" \ 120 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \ 121 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 122 "else " \ 123 "echo loading from dhcp ...; " \ 124 "run loadpxe; " \ 125 "fi;\0" 126 127 #define CONFIG_BOOTCOMMAND \ 128 "run mmcboot;" 129 130 #define CONFIG_ARP_TIMEOUT 200UL 131 132 /* Miscellaneous configurable options */ 133 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 134 135 #define CONFIG_SYS_MEMTEST_START 0x70000000 136 #define CONFIG_SYS_MEMTEST_END 0x70010000 137 138 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 139 140 /* Physical Memory Map */ 141 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 142 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 143 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 144 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 145 #define PHYS_SDRAM_SIZE (gd->ram_size) 146 147 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 148 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 149 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 150 151 #define CONFIG_SYS_INIT_SP_OFFSET \ 152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 153 #define CONFIG_SYS_INIT_SP_ADDR \ 154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 155 156 /* environment organization */ 157 #define CONFIG_SYS_MMC_ENV_DEV 0 158 159 /* Framebuffer and LCD */ 160 #define CONFIG_IMX_VIDEO_SKIP 161 162 #endif /* __CONFIG_H */ 163