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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Freescale Semiconductor, Inc.
4  * Jason Liu <r64343@freescale.com>
5  *
6  * Configuration settings for Freescale MX53 low cost board.
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_LOCO
13 
14 #include <asm/arch/imx-regs.h>
15 
16 #define CONFIG_CMDLINE_TAG
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 
20 #define CONFIG_SYS_FSL_CLK
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
24 
25 #define CONFIG_REVISION_TAG
26 
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE	UART1_BASE
29 
30 /* MMC Configs */
31 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
32 #define CONFIG_SYS_FSL_ESDHC_NUM	2
33 
34 /* Eth Configs */
35 
36 #define CONFIG_FEC_MXC
37 #define IMX_FEC_BASE	FEC_BASE_ADDR
38 #define CONFIG_FEC_MXC_PHYADDR	0x1F
39 
40 /* USB Configs */
41 #define CONFIG_MXC_USB_PORT	1
42 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
43 #define CONFIG_MXC_USB_FLAGS	0
44 
45 /* I2C Configs */
46 #define CONFIG_SYS_I2C
47 #define CONFIG_SYS_I2C_MXC
48 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
49 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
50 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
51 
52 /* PMIC Controller */
53 #define CONFIG_POWER
54 #define CONFIG_POWER_I2C
55 #define CONFIG_DIALOG_POWER
56 #define CONFIG_POWER_FSL
57 #define CONFIG_POWER_FSL_MC13892
58 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
59 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
60 
61 /* allow to overwrite serial and ethaddr */
62 #define CONFIG_ENV_OVERWRITE
63 
64 /* Command definition */
65 
66 
67 #define CONFIG_ETHPRIME		"FEC0"
68 
69 #define CONFIG_LOADADDR		0x72000000	/* loadaddr env var */
70 
71 #define CONFIG_EXTRA_ENV_SETTINGS \
72 	"script=boot.scr\0" \
73 	"image=zImage\0" \
74 	"fdt_addr=0x71000000\0" \
75 	"boot_fdt=try\0" \
76 	"ip_dyn=yes\0" \
77 	"mmcdev=0\0" \
78 	"mmcpart=1\0" \
79 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
80 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
81 	"loadbootscript=" \
82 		"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
83 	"bootscript=echo Running bootscript from mmc ...; " \
84 		"source\0" \
85 	"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
86 	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
87 	"mmcboot=echo Booting from mmc ...; " \
88 		"run mmcargs; " \
89 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
90 			"if run loadfdt; then " \
91 				"bootz ${loadaddr} - ${fdt_addr}; " \
92 			"else " \
93 				"if test ${boot_fdt} = try; then " \
94 					"bootz; " \
95 				"else " \
96 					"echo WARN: Cannot load the DT; " \
97 				"fi; " \
98 			"fi; " \
99 		"else " \
100 			"bootz; " \
101 		"fi;\0" \
102 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
103 		"root=/dev/nfs " \
104 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
105 	"netboot=echo Booting from net ...; " \
106 		"run netargs; " \
107 		"if test ${ip_dyn} = yes; then " \
108 			"setenv get_cmd dhcp; " \
109 		"else " \
110 			"setenv get_cmd tftp; " \
111 		"fi; " \
112 		"${get_cmd} ${image}; " \
113 		"if test ${boot_fdt} = yes ||  test ${boot_fdt} = try; then " \
114 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
115 				"bootz ${loadaddr} - ${fdt_addr}; " \
116 			"else " \
117 				"if test ${boot_fdt} = try; then " \
118 					"bootz; " \
119 				"else " \
120 					"echo ERROR: Cannot load the DT; " \
121 					"exit; " \
122 				"fi; " \
123 			"fi; " \
124 		"else " \
125 			"bootz; " \
126 		"fi;\0"
127 
128 #define CONFIG_BOOTCOMMAND \
129 	"mmc dev ${mmcdev}; if mmc rescan; then " \
130 		"if run loadbootscript; then " \
131 			"run bootscript; " \
132 		"else " \
133 			"if run loadimage; then " \
134 				"run mmcboot; " \
135 			"else run netboot; " \
136 			"fi; " \
137 		"fi; " \
138 	"else run netboot; fi"
139 
140 #define CONFIG_ARP_TIMEOUT	200UL
141 
142 /* Miscellaneous configurable options */
143 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
144 
145 #define CONFIG_SYS_MEMTEST_START       0x70000000
146 #define CONFIG_SYS_MEMTEST_END         0x70010000
147 
148 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
149 
150 /* Physical Memory Map */
151 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
152 #define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
153 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
154 #define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
155 #define PHYS_SDRAM_SIZE			(gd->ram_size)
156 
157 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
158 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
159 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
160 
161 #define CONFIG_SYS_INIT_SP_OFFSET \
162 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
163 #define CONFIG_SYS_INIT_SP_ADDR \
164 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
165 
166 /* Environment starts at 768k = 768 * 1024 = 786432 */
167 /*
168  * Detect overlap between U-Boot image and environment area in build-time
169  *
170  * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset
171  * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
172  *
173  * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
174  * write the direct value here
175  */
176 #define CONFIG_BOARD_SIZE_LIMIT		785408
177 #define CONFIG_SYS_MMC_ENV_DEV 0
178 
179 #ifdef CONFIG_CMD_SATA
180 	#define CONFIG_SYS_SATA_MAX_DEVICE      1
181 	#define CONFIG_DWC_AHSATA_PORT_ID       0
182 	#define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_BASE_ADDR
183 	#define CONFIG_LBA48
184 #endif
185 
186 /* Framebuffer and LCD */
187 #define CONFIG_VIDEO_BMP_RLE8
188 #define CONFIG_SPLASH_SCREEN
189 #define CONFIG_BMP_16BPP
190 #define CONFIG_VIDEO_LOGO
191 
192 #endif				/* __CONFIG_H */
193