1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved 4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 5 */ 6 7 #ifndef __CONFIG_STV0991_H 8 #define __CONFIG_STV0991_H 9 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 10 11 /* ram memory-related information */ 12 #define PHYS_SDRAM_1 0x00000000 13 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 14 #define PHYS_SDRAM_1_SIZE 0x00198000 15 16 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 17 18 /* user interface */ 19 #define CONFIG_SYS_CBSIZE 1024 20 21 /* MISC */ 22 #define CONFIG_SYS_LOAD_ADDR 0x00000000 23 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 24 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 25 #define CONFIG_SYS_INIT_SP_OFFSET \ 26 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 27 /* U-Boot Load Address */ 28 #define CONFIG_SYS_INIT_SP_ADDR \ 29 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 30 31 /* GMAC related configs */ 32 33 #define CONFIG_DW_ALTDESCRIPTOR 34 35 /* Command support defines */ 36 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 37 38 #define CONFIG_SYS_MEMTEST_START 0x0000 39 #define CONFIG_SYS_MEMTEST_END 1024*1024 40 41 /* Misc configuration */ 42 43 #define CONFIG_BOOTCOMMAND "go 0x40040000" 44 45 /* 46 + * QSPI support 47 + */ 48 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 49 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 50 51 #endif 52 53 #endif /* __CONFIG_H */ 54