1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 4 * (C) Copyright 2013 Siemens AG 5 * 6 * Based on: 7 * U-Boot file: include/configs/at91sam9260ek.h 8 * 9 * (C) Copyright 2007-2008 10 * Stelian Pop <stelian@popies.net> 11 * Lead Tech Design <www.leadtechdesign.com> 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 /* 18 * SoC must be defined first, before hardware.h is included. 19 * In this case SoC is defined in boards.cfg. 20 */ 21 #include <asm/hardware.h> 22 #include <linux/sizes.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 31 /* ARM asynchronous clock */ 32 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 33 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 34 35 /* Misc CPU related */ 36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 37 #define CONFIG_SETUP_MEMORY_TAGS 38 #define CONFIG_INITRD_TAG 39 40 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 41 42 /* general purpose I/O */ 43 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 44 #define CONFIG_AT91_GPIO 45 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 46 47 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 48 #define CONFIG_USART_ID ATMEL_ID_SYS 49 50 /* 51 * SDRAM: 1 bank, min 32, max 128 MB 52 * Initialized before u-boot gets started. 53 */ 54 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 55 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 56 57 /* 58 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 59 * leaving the correct space for initial global data structure above 60 * that address while providing maximum stack area below. 61 */ 62 #define CONFIG_SYS_INIT_SP_ADDR \ 63 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 64 65 /* NAND flash */ 66 #ifdef CONFIG_CMD_NAND 67 #define CONFIG_SYS_MAX_NAND_DEVICE 1 68 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 69 #define CONFIG_SYS_NAND_DBW_8 70 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 71 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 72 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 73 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 74 #endif 75 76 /* Ethernet */ 77 #define CONFIG_MACB 78 #define CONFIG_RMII 79 #define CONFIG_AT91_WANTS_COMMON_PHY 80 81 /* USB */ 82 #if defined(CONFIG_BOARD_TAURUS) 83 #define CONFIG_USB_ATMEL 84 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 85 #define CONFIG_USB_OHCI_NEW 86 #define CONFIG_SYS_USB_OHCI_CPU_INIT 87 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 88 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 89 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 90 91 /* USB DFU support */ 92 93 #define CONFIG_USB_GADGET_AT91 94 95 /* DFU class support */ 96 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 97 #define DFU_MANIFEST_POLL_TIMEOUT 25000 98 #endif 99 100 /* SPI EEPROM */ 101 #define TAURUS_SPI_MASK (1 << 4) 102 103 #if defined(CONFIG_SPL_BUILD) 104 /* SPL related */ 105 #endif 106 107 /* load address */ 108 #define CONFIG_SYS_LOAD_ADDR 0x22000000 109 110 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 111 112 #ifndef CONFIG_SPL_BUILD 113 #if defined(CONFIG_BOARD_AXM) 114 #define CONFIG_EXTRA_ENV_SETTINGS \ 115 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 116 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 117 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 118 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 119 "boot_retries=0\0" \ 120 "ethact=macb0\0" \ 121 "flash_nfs=run nand_kernel;run nfsargs;run addip;" \ 122 "upgrade_available;bootm ${kernel_ram};reset\0" \ 123 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 124 "bootm ${kernel_ram};reset\0" \ 125 "flash_self_test=run nand_kernel;run setbootargs addtest;" \ 126 "upgrade_available;bootm ${kernel_ram};reset\0" \ 127 "hostname=systemone\0" \ 128 "kernel_Off=0x00200000\0" \ 129 "kernel_Off_fallback=0x03800000\0" \ 130 "kernel_ram=0x21500000\0" \ 131 "kernel_size=0x00400000\0" \ 132 "kernel_size_fallback=0x00400000\0" \ 133 "loads_echo=1\0" \ 134 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 135 "${kernel_size}\0" \ 136 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 137 "run nfsargs;run addip;upgrade_available;" \ 138 "bootm ${kernel_ram};reset\0" \ 139 "netdev=eth0\0" \ 140 "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \ 141 "rw nfsroot=${serverip}:${rootpath} " \ 142 "at91sam9_wdt.wdt_timeout=16\0" \ 143 "partitionset_active=A\0" \ 144 "preboot=echo;echo Type 'run flash_self' to use kernel and root " \ 145 "filesystem on memory;echo Type 'run flash_nfs' to use " \ 146 "kernel from memory and root filesystem over NFS;echo Type " \ 147 "'run net_nfs' to get Kernel over TFTP and mount root " \ 148 "filesystem over NFS;echo\0" \ 149 "project_dir=systemone\0" \ 150 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \ 151 "rootfs=/dev/mtdblock5\0" \ 152 "rootfs_fallback=/dev/mtdblock7\0" \ 153 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \ 154 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 155 "at91sam9_wdt.wdt_timeout=16\0" \ 156 "stderr=serial\0" \ 157 "stdin=serial\0" \ 158 "stdout=serial\0" \ 159 "upgrade_available=0\0" 160 #endif 161 #endif /* #ifndef CONFIG_SPL_BUILD */ 162 /* 163 * Size of malloc() pool 164 */ 165 #define CONFIG_SYS_MALLOC_LEN \ 166 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 167 168 /* Defines for SPL */ 169 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 170 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 171 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 172 CONFIG_SYS_MALLOC_LEN) 173 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 174 175 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 176 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 177 178 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 179 #define CONFIG_SYS_USE_NANDFLASH 1 180 #define CONFIG_SPL_NAND_DRIVERS 181 #define CONFIG_SPL_NAND_BASE 182 #define CONFIG_SPL_NAND_ECC 183 #define CONFIG_SPL_NAND_RAW_ONLY 184 #define CONFIG_SPL_NAND_SOFTECC 185 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 186 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 187 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 188 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 189 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 190 191 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 192 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 193 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 194 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 195 CONFIG_SYS_NAND_PAGE_SIZE) 196 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 197 #define CONFIG_SYS_NAND_ECCSIZE 256 198 #define CONFIG_SYS_NAND_ECCBYTES 3 199 #define CONFIG_SYS_NAND_OOBSIZE 64 200 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 201 48, 49, 50, 51, 52, 53, 54, 55, \ 202 56, 57, 58, 59, 60, 61, 62, 63, } 203 204 #define CONFIG_SPL_ATMEL_SIZE 205 #define CONFIG_SYS_MASTER_CLOCK 132096000 206 #define AT91_PLL_LOCK_TIMEOUT 1000000 207 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 208 #define CONFIG_SYS_MCKR 0x1300 209 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 210 #define CONFIG_SYS_AT91_PLLB 0x10193F05 211 212 #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS 213 #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO 214 215 #endif 216