1 /* 2 * NS16550 Serial Port 3 * originally from linux source (arch/powerpc/boot/ns16550.h) 4 * 5 * Cleanup and unification 6 * (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH 7 * 8 * modified slightly to 9 * have addresses as offsets from CONFIG_SYS_ISA_BASE 10 * added a few more definitions 11 * added prototypes for ns16550.c 12 * reduced no of com ports to 2 13 * modifications (c) Rob Taylor, Flying Pig Systems. 2000. 14 * 15 * added support for port on 64-bit bus 16 * by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems 17 */ 18 19 /* 20 * Note that the following macro magic uses the fact that the compiler 21 * will not allocate storage for arrays of size 0 22 */ 23 24 #include <linux/types.h> 25 26 #ifdef CONFIG_DM_SERIAL 27 /* 28 * For driver model we always use one byte per register, and sort out the 29 * differences in the driver 30 */ 31 #define CONFIG_SYS_NS16550_REG_SIZE (-1) 32 #endif 33 34 #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) 35 #error "Please define NS16550 registers size." 36 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) 37 #define UART_REG(x) u32 x 38 #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) 39 #define UART_REG(x) \ 40 unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \ 41 unsigned char x; 42 #elif (CONFIG_SYS_NS16550_REG_SIZE < 0) 43 #define UART_REG(x) \ 44 unsigned char x; \ 45 unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; 46 #endif 47 48 /** 49 * struct ns16550_platdata - information about a NS16550 port 50 * 51 * @base: Base register address 52 * @reg_width: IO accesses size of registers (in bytes) 53 * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) 54 * @clock: UART base clock speed in Hz 55 * @bdf: PCI slot/function (pci_dev_t) 56 */ 57 struct ns16550_platdata { 58 unsigned long base; 59 int reg_width; 60 int reg_shift; 61 int reg_offset; 62 int clock; 63 u32 fcr; 64 #if defined(CONFIG_PCI) && defined(CONFIG_SPL) 65 int bdf; 66 #endif 67 }; 68 69 struct udevice; 70 71 struct NS16550 { 72 UART_REG(rbr); /* 0 */ 73 UART_REG(ier); /* 1 */ 74 UART_REG(fcr); /* 2 */ 75 UART_REG(lcr); /* 3 */ 76 UART_REG(mcr); /* 4 */ 77 UART_REG(lsr); /* 5 */ 78 UART_REG(msr); /* 6 */ 79 UART_REG(spr); /* 7 */ 80 #ifdef CONFIG_SOC_DA8XX 81 UART_REG(reg8); /* 8 */ 82 UART_REG(reg9); /* 9 */ 83 UART_REG(revid1); /* A */ 84 UART_REG(revid2); /* B */ 85 UART_REG(pwr_mgmt); /* C */ 86 UART_REG(mdr1); /* D */ 87 #else 88 UART_REG(mdr1); /* 8 */ 89 UART_REG(reg9); /* 9 */ 90 UART_REG(regA); /* A */ 91 UART_REG(regB); /* B */ 92 UART_REG(regC); /* C */ 93 UART_REG(regD); /* D */ 94 UART_REG(regE); /* E */ 95 UART_REG(uasr); /* F */ 96 UART_REG(scr); /* 10*/ 97 UART_REG(ssr); /* 11*/ 98 #endif 99 #ifdef CONFIG_DM_SERIAL 100 struct ns16550_platdata *plat; 101 #endif 102 }; 103 104 #define thr rbr 105 #define iir fcr 106 #define dll rbr 107 #define dlm ier 108 109 typedef struct NS16550 *NS16550_t; 110 111 /* 112 * These are the definitions for the FIFO Control Register 113 */ 114 #define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ 115 #define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ 116 #define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ 117 #define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ 118 #define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ 119 #define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ 120 #define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ 121 #define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ 122 #define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ 123 124 #define UART_FCR_RXSR 0x02 /* Receiver soft reset */ 125 #define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ 126 127 /* Ingenic JZ47xx specific UART-enable bit. */ 128 #define UART_FCR_UME 0x10 129 130 /* Clear & enable FIFOs */ 131 #define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \ 132 UART_FCR_RXSR | \ 133 UART_FCR_TXSR) 134 135 /* 136 * These are the definitions for the Modem Control Register 137 */ 138 #define UART_MCR_DTR 0x01 /* DTR */ 139 #define UART_MCR_RTS 0x02 /* RTS */ 140 #define UART_MCR_OUT1 0x04 /* Out 1 */ 141 #define UART_MCR_OUT2 0x08 /* Out 2 */ 142 #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ 143 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS */ 144 145 #define UART_MCR_DMA_EN 0x04 146 #define UART_MCR_TX_DFR 0x08 147 148 /* 149 * These are the definitions for the Line Control Register 150 * 151 * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting 152 * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. 153 */ 154 #define UART_LCR_WLS_MSK 0x03 /* character length select mask */ 155 #define UART_LCR_WLS_5 0x00 /* 5 bit character length */ 156 #define UART_LCR_WLS_6 0x01 /* 6 bit character length */ 157 #define UART_LCR_WLS_7 0x02 /* 7 bit character length */ 158 #define UART_LCR_WLS_8 0x03 /* 8 bit character length */ 159 #define UART_LCR_STB 0x04 /* # stop Bits, off=1, on=1.5 or 2) */ 160 #define UART_LCR_PEN 0x08 /* Parity eneble */ 161 #define UART_LCR_EPS 0x10 /* Even Parity Select */ 162 #define UART_LCR_STKP 0x20 /* Stick Parity */ 163 #define UART_LCR_SBRK 0x40 /* Set Break */ 164 #define UART_LCR_BKSE 0x80 /* Bank select enable */ 165 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ 166 167 /* 168 * These are the definitions for the Line Status Register 169 */ 170 #define UART_LSR_DR 0x01 /* Data ready */ 171 #define UART_LSR_OE 0x02 /* Overrun */ 172 #define UART_LSR_PE 0x04 /* Parity error */ 173 #define UART_LSR_FE 0x08 /* Framing error */ 174 #define UART_LSR_BI 0x10 /* Break */ 175 #define UART_LSR_THRE 0x20 /* Xmit holding register empty */ 176 #define UART_LSR_TEMT 0x40 /* Xmitter empty */ 177 #define UART_LSR_ERR 0x80 /* Error */ 178 179 #define UART_MSR_DCD 0x80 /* Data Carrier Detect */ 180 #define UART_MSR_RI 0x40 /* Ring Indicator */ 181 #define UART_MSR_DSR 0x20 /* Data Set Ready */ 182 #define UART_MSR_CTS 0x10 /* Clear to Send */ 183 #define UART_MSR_DDCD 0x08 /* Delta DCD */ 184 #define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ 185 #define UART_MSR_DDSR 0x02 /* Delta DSR */ 186 #define UART_MSR_DCTS 0x01 /* Delta CTS */ 187 188 /* 189 * These are the definitions for the Interrupt Identification Register 190 */ 191 #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ 192 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ 193 194 #define UART_IIR_MSI 0x00 /* Modem status interrupt */ 195 #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ 196 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ 197 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ 198 199 /* 200 * These are the definitions for the Interrupt Enable Register 201 */ 202 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ 203 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ 204 #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ 205 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ 206 207 /* useful defaults for LCR */ 208 #define UART_LCR_8N1 0x03 209 210 void NS16550_init(NS16550_t com_port, int baud_divisor); 211 void NS16550_putc(NS16550_t com_port, char c); 212 char NS16550_getc(NS16550_t com_port); 213 int NS16550_tstc(NS16550_t com_port); 214 void NS16550_reinit(NS16550_t com_port, int baud_divisor); 215 216 /** 217 * ns16550_calc_divisor() - calculate the divisor given clock and baud rate 218 * 219 * Given the UART input clock and required baudrate, calculate the divisor 220 * that should be used. 221 * 222 * @port: UART port 223 * @clock: UART input clock speed in Hz 224 * @baudrate: Required baud rate 225 * @return baud rate divisor that should be used 226 */ 227 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate); 228 229 /** 230 * ns16550_serial_ofdata_to_platdata() - convert DT to platform data 231 * 232 * Decode a device tree node for an ns16550 device. This includes the 233 * register base address and register shift properties. The caller must set 234 * up the clock frequency. 235 * 236 * @dev: dev to decode platform data for 237 * @return: 0 if OK, -EINVAL on error 238 */ 239 int ns16550_serial_ofdata_to_platdata(struct udevice *dev); 240 241 /** 242 * ns16550_serial_probe() - probe a serial port 243 * 244 * This sets up the serial port ready for use, except for the baud rate 245 * @return 0, or -ve on error 246 */ 247 int ns16550_serial_probe(struct udevice *dev); 248 249 /** 250 * struct ns16550_serial_ops - ns16550 serial operations 251 * 252 * These should be used by the client driver for the driver's 'ops' member 253 */ 254 extern const struct dm_serial_ops ns16550_serial_ops; 255