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Lines Matching refs:RegScavenger

53 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) {  in setRegUsed()
57 void RegScavenger::init(MachineBasicBlock &MBB) { in init()
84 void RegScavenger::enterBasicBlock(MachineBasicBlock &MBB) { in enterBasicBlock()
89 void RegScavenger::enterBasicBlockEnd(MachineBasicBlock &MBB) { in enterBasicBlockEnd()
100 void RegScavenger::addRegUnits(BitVector &BV, MCRegister Reg) { in addRegUnits()
105 void RegScavenger::removeRegUnits(BitVector &BV, MCRegister Reg) { in removeRegUnits()
110 void RegScavenger::determineKillsAndDefs() { in determineKillsAndDefs()
157 void RegScavenger::forward() { in forward()
242 void RegScavenger::backward() { in backward()
263 bool RegScavenger::isRegUsed(Register Reg, bool includeReserved) const { in isRegUsed()
269 Register RegScavenger::FindUnusedReg(const TargetRegisterClass *RC) const { in FindUnusedReg()
280 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { in getRegsAvailable()
288 Register RegScavenger::findSurvivorReg(MachineBasicBlock::iterator StartMI, in findSurvivorReg()
441 RegScavenger::ScavengedInfo &
442 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in spill()
516 Register RegScavenger::scavengeRegister(const TargetRegisterClass *RC, in scavengeRegister()
561 Register RegScavenger::scavengeRegisterBackwards(const TargetRegisterClass &RC, in scavengeRegisterBackwards()
605 static Register scavengeVReg(MachineRegisterInfo &MRI, RegScavenger &RS, in scavengeVReg()
660 RegScavenger &RS, in scavengeFrameVirtualRegsInBlock()
733 void llvm::scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS) { in scavengeFrameVirtualRegs()
779 RegScavenger RS; in runOnMachineFunction()